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2021-12-09hw/lpc: fix compilation errorNicholas Piggin1-0/+1
Compilation can fail when building tests if the opal-api.h include is not pulled in via headers. Include it directly. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-03-12Re-license IBM written files as Apache 2.0 OR GPLv2+Stewart Smith1-1/+1
SPDX makes it a simpler diff. I have audited the commit history of each file to ensure that they are exclusively authored by IBM and thus we have the right to relicense. The motivation behind this is twofold: 1) We want to enable experiments with coreboot, which is GPLv2 licensed 2) An upcoming firmware component wants to incorporate code from skiboot and code from the Linux kernel, which is GPLv2 licensed. I have gone through the IBM internal way of gaining approval for this. The following files are not exclusively authored by IBM, so are *not* included in this update (I will be seeking approval from contributors): core/direct-controls.c core/flash.c core/pcie-slot.c external/common/arch_flash_unknown.c external/common/rules.mk external/gard/Makefile external/gard/rules.mk external/opal-prd/Makefile external/pflash/Makefile external/xscom-utils/Makefile hdata/vpd.c hw/dts.c hw/ipmi/ipmi-watchdog.c hw/phb4.c include/cpu.h include/phb4.h include/platform.h libflash/libffs.c libstb/mbedtls/sha512.c libstb/mbedtls/sha512.h platforms/astbmc/barreleye.c platforms/astbmc/garrison.c platforms/astbmc/mihawk.c platforms/astbmc/nicole.c platforms/astbmc/p8dnu.c platforms/astbmc/p8dtu.c platforms/astbmc/p9dsu.c platforms/astbmc/vesnin.c platforms/rhesus/ec/config.h platforms/rhesus/ec/gpio.h platforms/rhesus/gpio.c platforms/rhesus/rhesus.c platforms/astbmc/talos.c platforms/astbmc/romulus.c Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: fixed up the drift] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-11-04hw/port80: Squash No SYNC errorOliver O'Halloran1-3/+4
On Aspeed BMCs can be configured to route LPC IO address 0x80 to a GPIO port. Some systems use this to implement a boot progress indicator, but not all of them. There's no easy way to tell if this has been setup or not and if it hasn't we get an LPC SYNC no-response error from out LPC master. When we reach Linux and enable interrupts this results in this spurious error being printed: LPC[000]: Got SYNC no-response error. Error address reg: 0xd0010082 lpc_probe_write() is intended to catch situations where the peripherial being written to might not be configured, so use that instead of lpc_outb() to squash the error. Cc: Ranga <stewart@flamingspork.com> Cc: Andrew Jeffery <andrew@aj.id.au> Acked-by: Andrew Jeffery <andrew@aj.id.au> [oliver: fixed the test] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith1-13/+4
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-06-03lpc-port80h: Don't write port 80h when running under SimicsAlistair Popple1-0/+4
Simics doesn't model LPC port 80h. Writing to it terminates the simulation due to an invalid LPC memory access. This patch adds a check to ensure port 80h isn't accessed if we are running under Simics. Signed-off-by: Alistair Popple <alistair@popple.id.au> [stewart: fixup run-port80h test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-02Write boot progress to LPC ports 81 and 82Stewart Smith1-0/+78
There's a thought to write more extensive boot progress codes to LPC ports 81 and 82 to supplement/replace any reliance on port 80. We want to still emit port 80 for platforms like Zaius and Barreleye that have the physical display. Ports 81 and 82 can be monitored by a BMC though. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-02Write boot progress to LPC port 80hStewart Smith1-0/+99
This is an adaptation of what we currently do for op_display() on FSP machines, inventing an encoding for what we can write into the single byte at LPC port 80h. Port 80h is often used on x86 systems to indicate boot progress/status and dates back a decent amount of time. Since a byte isn't exactly very expressive for everything that can go on (and wrong) during boot, it's all about compromise. Some systems (such as Zaius/Barreleye G2) have a physical dual 7 segment display that display these codes. So far, this has only been driven by hostboot (see hostboot commit 90ec2e65314c). Signed-off-by: Stewart Smith <stewart@linux.ibm.com>