Age | Commit message (Collapse) | Author | Files | Lines |
|
In some error conditions, we could spiral out of control on this
and spend all of our time printing the exact same backtrace.
Limit it to 16 times, because 16 is a nice number.
Cc: stable
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit b6a729e118f42dae88ebf70a09a7e2aa4f788fdc)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
I made the inappropriate assumption: PCI slot's power state is
always on from the beginning. We don't check the slot's power
state before turning it off in PCI enumeration path when there
are no PCI adapters behind the slot. The PCI slot's power might
have been turned off and we needn't power it off again. Otherwise,
the below (not harmful) message is raised:
[ 47.243635711,5] SkiBoot skiboot-5.4.0-rc1 starting...
:
[ 13.239871630,5] PHB#0001:02:01.0 Error -1 powering off slot
This checks power state and avoid turning it off again if it's
already in off state. Flag PCI_SLOT_FLAG_BOOTUP is also removed
after the requested operation is completed as the flag should
be used at skiboot booting stage.
Cc: stable # 5.3.0+
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Tested-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 1408f6f9baa684f280dfb2c4a66daa4d5db996b2)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
When RC's downstream link is down, we need reserve spare PCI buses
if it has an associated PCI hotplug slot. Otherwise, the adapter
behind it can't be probed successfully in PCI hot add scenario.
This reserves all available buses (to 255) for RC's hotplug slot
when its downstream is down so that PCI adapter can be hot added
to the slot afterwards.
Cc: stable # 5.3.0+
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 481ad7330e332770b1dcd2c9f56d0a2caac67755)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
We might need know the associated PCI slot before applying the chip
level quirk (phb->ops->device_init()) so that special configuration
on the specific PCI slot can be applied.
This moves the logic of creating PCI slot, applying the quirk and
linking the newly probed device to parent's child list to function
pci_scan_one(). Also, the PCI slot is created prior to applying the
quirk.
Cc: stable # 5.3.0+
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 39aad95618fea977464bfc38ec0c190075a26304)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
The timeout should be 1000ms instead of 1000 ticks while powering
off PCI slot in pci_slot_power_off(). Otherwise, it's likely to
hit timeout powering off the PCI slot as below skiboot logs reveal:
[47912590456,5] SkiBoot skiboot-5.3.6 starting...
:
[5399532365,7] PHB#0005:02:11.0 Bus 0f..ff scanning...
[5399540804,7] PHB#0005:02:11.0 No card in slot
[5399576870,5] PHB#0005:02:11.0 Timeout powering off slot
[5401431782,3] FIRENZE-PCI: Wrong state 00000000 on slot 8000000002880005
This replaces time_wait() with time_wait_ms() to resolve the issue.
Fixes: 358b4d654f100cfdfcba939cae012099a851b3bc
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 171726631d014cd5e61170f06028474d900a827e)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
High volume of SYNC errors onto LPC bus cause degraded system
performance and are likely due to bad hardware present onto system.
Thus once LPC SYNC errors cross a certain threshold, OPAL should log
them onto BMC as unrecoverable errors in manufacturing mode. This
will help manufacturing screen bad parts, causing such errors.
Cc: stable
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: s/mfg/manufacturing/]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 51b9eeb66ebbd1706248d8f2277afa9b7dcdbc3b)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
With the skiboot log set to debug, the FIR (and related registers) were
logged all in the same message. It was too much for one line, didn't
clarify if the numbers were in hex, and didn't show leading zeroes.
So, split it into two lines, with leading zeroes and a "0x" prefix.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 4eabfa056562e144c1a011bf4159387337023659)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Below are the in-memory console log messages observed with error level(PR_ERROR)
[54460318,3] HBRT: Mem region 'ibm,homer-image' not found !
[54465404,3] HBRT: Mem region 'ibm,homer-image' not found !
[54470372,3] HBRT: Mem region 'ibm,homer-image' not found !
[54475369,3] HBRT: Mem region 'ibm,homer-image' not found !
[11540917382,3] NVRAM: Layout appears sane
[11694529822,3] OPAL: Trying a CPU re-init with flags: 0x2
[61291003267,3] OPAL: Trying a CPU re-init with flags: 0x1
[61394005956,3] OPAL: Trying a CPU re-init with flags: 0x2
Lowering the log level of mem region not found messages to PR_WARNING and remaining messages to PR_INFO level
[54811683,4] HBRT: Mem region 'ibm,homer-image' not found !
[10923382751,6] NVRAM: Layout appears sane
[55533988976,6] OPAL: Trying a CPU re-init with flags: 0x1
Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
(cherry picked from commit 341daa8104af3231b908e6fcffeedb5e47b33990)
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
flash_find_subpartition() accepts a pointer to a boolean variable
indicating ecc for a region of flash and passes the pointer directly
to flash_read_corrected() which actually only wants the value. This
has always worked probably because there has always been ECC on
sub partitions.
How there aren't any warnings triggered by this condition escapes me.
Fixes: 6c26bc7 ("libflash: move ffs_flash_read into libflash")
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Be more verbose (at debug level) when formatting the NVRAM, this can
help catch errors at other levels of the stack.
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Save everyone a trip to asciitable.com. I realise everyone has probably
memorised \n and friends, but THAT'S NOT THE POINT.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
The timer code currently has a default and a special check for FSP
machines or those with SLW timer facility.
This patch adds support for platform quirk to set the timer.
Signed-off-by: Chris Smart <chris@distroguy.com>
Acked-by: Michael Neuling <mikey@neuling.org>
[stewart@linux.vnet.ibm.com: fix whitespace issue]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
HEARTBEAT_DEFAULT_MS sets the default heartbeat timeout, however this
was not actually used as the default. The default was ten times quicker
than this (HEARTBEAT_DEFAULT_MS / 10) while HEARTBEAT_DEFAULT_MS was
actually used as a special case for FSP machines or those with SLW
timer facility.
This patch makes the default use HEARTBEAT_DEFAULT_MS and changes FSP
or machines with SLW timer facility run 10 times slower
(HEARTBEAT_DEFAULT_MS * 10). This will also now match the existing
in-line comment.
Signed-off-by: Chris Smart <chris@distroguy.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Since the very first commit of a skeleton powernv platform in Linux,
the kernel has been able to deal with phandle rather than linux,phandle.
Thus, every kernel in the real world that has a hope of even getting to
a twinkle in the eye of booting knows about phandle.
So, we don't need to add linux,phandle along with phandle as it's just
redundantly redundant.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Convert flashes from a static array which wastes memory and limits us.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
On P8 we got it a bit wrong and would fall into a workaround for P8 DD1
HILE setting if other bits were set in the flags to OPAL_REINIT_CPUS,
limiting our opportunity to extend it in the future.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Also make the locking around re-init safer, properly block the
OS from restarting a thread that was caught for re-init.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This makes irq_source public, and change all irq_source_ops to take
the source pointer as a first argument (they can still dig the void *
data out of that).
This will allow us to embed/wrap it for XIVE later on.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This is more compliant with PAPR, it will also allow us to
use the second cell for other attributes on P9.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Run a small wrapper around some unit tests with the QTEST makefile macro
(QTEST=Quiet TEST). Also, wrap boot tests in mambo and qemu to be quiet
by default.
Both ./test/run.sh and the modified mambo/qemu test runner scripts output
full stdout and stderr in the event of error.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Found by smatch static analysis (http://smatch.sourceforge.net/):
core/nvram-format.c:146 nvram_check() warn: inconsistent indenting
core/nvram-format.c:151 nvram_check() warn: inconsistent indenting
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Found by smatch static analysis (http://smatch.sourceforge.net/):
core/mem_region.c:561 mem_check() warn: inconsistent indenting
core/mem_region.c:569 mem_check() warn: inconsistent indenting
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This adds the base support for the PHB4. It currently only support
the M32 window, EEH or in general error recovery aren't supported
yet.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: update (C) year, fix indenting]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
PCIe devices cache the bus number on the first config write, make sure
we restore them when at the same time
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
The value might be different for different PHB instances
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This provides basic initialization of the XIVE along with some OPAL calls
to emulate an old-style XICS which will initially be used by Linux for
backward compatibility.
The current implementation is limited to one priority and doesn't expose
much to Linux for future exploitation mode yet.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: add (C) header, fix whitespace, missing breaks]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This will be used by the XICS emulation in order to EOI the
sources themselves.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This will internally pretend the timebase is running 1000 times
slower, which reduces some otherwise really terrible delays in
some simulators.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
[stewart@linux.vnet.ibm.com: move cfam_chipid cleanup into own patch]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This accessor tests the "status" property allowing us to represent
disabled devices in the device-tree. It will be used by PHB4 initially
but its usage could be made more widespread.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Add more generic support for MMIO based UARTs, simplify code,
use common initialization, and clean up the device-tree
representation as well.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Was causing boot failures on Garrison and Firestone (likely other
OpenPower platforms)
This reverts commit 74ba83462c64d6a987ed4785aee55309daf9ffb6.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Use that instead of mambo.
Simics supports the F000F, so remove that quirk.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
flash_read_corrected() assumes the passed blocklevel device is an
actual flash device. However the blocklevel flash abstraction supports
automatically reading ECC protected data so use that instead.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Increase the max number of flash devices from 1 to 8.
With mambo bogusdisk, we can have many flash devices.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
ISAv3 adds a mode to increase the size of the decrementer from 32 bits.
The enlarged decrementer can be between 32 and 64 bits wide with the
exact value being implementation dependent. This patch adds support for
detecting the size of the large decrementer and populating each CPU node
with the "ibm,dec-bits" property.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: rename enable_ld() to enable_large_dec()]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
For the missing OPAL_CHECK_TOKEN call, it means we catch kernel bugs in
the firmware test suite, which I guess is a valid thing to do, if slightly
odd. Unfortunately, kernels for POWER8 systems shipped with this (totally
harmless) bug, so it's possible that if FWTS is run on older POWER8 PowerNV
kernels, this warning will be hit. On POWER9 and above though, this
warning should never be hit.
The annotations for pollers should also never be hit, although I'm not
convinced we don't have a spot or two in OPAL where this could still be
the case (specifically, under certain error conditions).
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Two possible error states: kernel asks us for something incorrect,
OPAL runs out of memory... both of which require investigation.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
NPU fences aren't recoverable, and as such, would require user
intervention to have a working system again. The fence will be picked up
by the kernel through EEH, but this doesn't happen until the NPU is used
for something. So, let's print a message so it's obvious when this
happens.
A helper function was added to reduce duplication. This also enables code
in skiboot to un-fence a NPU, which is useful to NPU developers but very
stupid otherwise.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
wwhich -> which.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This patch removes the check which prevents adding any idle state to
"power-mgt" node in mambo.
Power8 exposes 3 idle states- nap, fast-sleep and deep-winkle.
While fast-sleep depends on SCOMs and deep-winkle depends on SCOMs/SLW,
nap has no such dependencies and it can be enabled in mambo. Current code
checks for "fast-sleep" in hostboot provided
"ibm,enabled-idle-states" dt node for adding fast-sleep and checks
for presence of SLW for adding winkle to "power-mgt". Hence with this
change only nap will be added to "power-mgt" node in mambo on Power8.
On Power9, this patch enables all idle states which don't need SLW.
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Commit 3ff35034 (Abstract HILE and attn enable bit definitions for HID0)
enabled HILE bit instead of ATTN bit in enable/disable_attn fuction.
Hence OPAL assert is failing.
Fixes: 3ff35034 (Abstract HILE and attn enable bit definitions for HID0)
CC: Michael Neuling <mikey@neuling.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
The various reset requests are completed by PHB's callbacks. All
of them (except reset on IODA table or error injection) are covered
by PCI slot. opal_pci_poll() faces similar situation.
This reimplements opal_pci_reset() and opal_pci_poll() based on
the callbacks provided by PCI slot instead of PHB. Also, couple of
new APIs are introduced based on the callbacks in PCI slot as below:
* opal_pci_get_presence_state(): Check if there is adapter presented
behind the specified PHB or PCI slot.
* opal_pci_get_power_state(): Returns power supply state (on or off)
on the specified PHB or PCI slot.
* opal_pci_set_power_state(): Sets power supply state (on or off)
on the specified PHB or PCI slot. Besides, the state can be (offline
or online) without changing the PCI slot's power state.
Eventually, the definition of unused PHB's callbacks are removed.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This powers off the empty hotpluggable slot during PCI enumeration
for two purpose: power saving and initialize the slot to starting
(power-off) state.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
During PCI enumeration, the root complex's link and fundamental
reset are carried out by PHB's callbacks which are replaced by
the corresponding PCI slot's callbacks. Also, the hotplug related
device node properties are populated based on the PCI slot info
that is included in PCI slot now.
This uses PCI slot in enumeration:
* Use PCI slot's callbacks for fundamental reset and link status
retrieval in PCI enumeration.
* Simplify the code by removing traditional PCI/PCI-x related
logic as we don't have PCI/PCI-X root complex.
* Replace pci_add_slot_properties() with pci_slot_add_properties()
to populate PCI slot properties in device-tree.
* PHB is always not hotpluggable. No hotpluggable properties in
its device node are needed.
* Remove "struct pci_slot_info" definition as its info is included
in "struct pci_slot".
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Every PCIE bridge port or PHB is expected to be bound with PCI slot
, to which various PCI slot's functionalities are attached (e.g. power,
link, reset). This supports PCI slot:
* PCI slot is reprsented by "struct pci_slot".
* "struct pci_slot_ops" represents the functions supported on the
PCI slot. It's initialized by PCI slot core at the beginning and
allowed to be overrided by platform partially or completely.
* On PCI hot plugging event, the PCI devices behind the slot are
enumarated. Device sub-tree is populated and sent to OS by OPAL
message.
* On PCI hot unplugging event, the PCI devices behind the slot are
destroyed. Device sub-tree is removed and the slot is powered off.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
This adds @data argument and "int" return value for struct phb_ops::
device_init() so that it can be called in pci_walk_dev() directly to
reinitialize the PCI devices behind the specified slot in subsequent
patches.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|
|
Currently, pci_restore_bridge_buses() restores the assigned bus
ranges for all PCI bridges behind the specified PHB. This extends
the function and allows doing same thing for the PCI bridges behind
the specified slot. The extended functionality is going to be used
by PCI hotplug logic in the subsequent patches.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
|