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2019-10-22chip: enable HOMER/OCC common area region in Qemu emulated PowerNV hostBalamuruhan S1-2/+2
Recent work on Qemu adds support to emulate homer memory region and occ common area region with respective device models, so remove `QUIRK_NO_PBA` to enable HOMER/OCC common area region for Qemu emulated PowerNV host. Introduce `QUIRK_QEMU` in enum proc_chip_quirks that will be used for future work. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Balamuruhan S <bala24@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith1-16/+2
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-06-04Remove POWER7 and POWER7+ supportStewart Smith1-3/+3
It's been a good long while since either OPAL POWER7 user touched a machine, and even longer since they'd have been okay using an old version rather than tracking master. There's also been no testing of OPAL on POWER7 systems for an awfully long time, so it's pretty safe to assume that it's very much bitrotted. It also saves a whole 14kb of xz compressed payload space. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Enthusiasticly-Acked-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-20chip: add no-nx quirk for all QEMU platformsCédric Le Goater1-2/+4
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2017-12-13opal: Get chip location codeMahesh Salgaonkar1-0/+10
and store it under proc_chip for quick reference during HMI handling code. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-03direct-controls: enable fast reboot direct controls for mamboNicholas Piggin1-1/+1
Add mambo direct controls to stop threads, which is required for reliable fast-reboot. Enable direct controls by default on mambo. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15chip: Print out when we initialise a chipMichael Ellerman1-0/+1
Print out when we initialise a chip and which node we initialised it from, purely for informational porpoises. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15core: Move enable_mambo_console() into chip initialisationMichael Ellerman1-0/+4
Rather than having a wart in main_cpu_entry() that initialises the mambo console, we can move it into init_chips() which is where we discover that we're on mambo. This also means we don't need to check the quirk again, and has the added bonus that an assert in chip initialisation (which follows immediately) will actually produce output. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> [stewart@linux.vnet.ibm.com: fix make check by adding no-op stub] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14chip: Add support for discovering chips on mamboMichael Ellerman1-0/+5
Currently the only way for skiboot to discover chips is by looking for xscom nodes. But on mambo it's currently not possible to create multiple xscom nodes, which means we can only simulate a single chip system. However it seems we can fairly cleanly add support for a special mambo chip node, and use that to instantiate multiple chips. Add a check in init_chip() that we're not clobbering an already initialised chip, now that we have two places that initialise chips. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14chip: Factor out chip inititialisationMichael Ellerman1-21/+29
Move the chip initialisation logic into a function, so we can call it from elsewhere in future. Only change to the logic is that we don't insert the chip into chips[] until we've finished initialising it. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-04-27nx: Add POWER9 DARN supportMichael Neuling1-1/+1
This sets up the per chip RNG MMIO BAR and points the per core DARN BAR at it. This is needed on P9 to enabled the DARN instruction (otherwise it'll cause a xstop). This includes a minor rework of some #defines to abstract MMIO definitions. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-12-21Always set ibm,occ-functional-state correctlyPridhiviraj Paidipeddi1-1/+1
Currently chip->occ_functional data field set's to true always whether ibm,occ-functional-state property exists or not. ibm,occ-functional-state property of xscom node's are populated only in ibm,fsp systems by detecting the OCC state in OPAL/SPIRA. In non-fsp(i.e OpenPower) systems this property is not populating. But OPAL sets chip->occ_functional field incorrectly to true without acually knowing the occ state. OCC Spec says: When OCC is told to go active it will populate OCC-OPAL shared memory interface with ‘valid’ and all Pstate data. So incase of OpenPower systems OPAL can add DT property ibm,occ-functional-state and set the chip->occ_functional when OPAL finds the valid homer region and corresponding occ_valid byte is set to 0x1. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: squash commits, tweak commit message] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-08-22chip: Add a quirk for when core direct control XSCOMs are missingBenjamin Herrenschmidt1-2/+4
Those will be needed by fast reboot. For now, mark qemu and mambo as not having them. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-08-11lpc: Move LPC instance variables to a private structureBenjamin Herrenschmidt1-1/+0
Take them out of struct proc_chip and into a private struct lpcm that's local to lpc.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-08-11chiptod: Enable ChipTOD in SIMICSBenjamin Herrenschmidt1-1/+1
It models it properly these days so the quirk is unnecessary Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-07-06Timebase quirk for slow simulators like AWAN and SIMICSBenjamin Herrenschmidt1-1/+12
This will internally pretend the timebase is running 1000 times slower, which reduces some otherwise really terrible delays in some simulators. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: move cfam_chipid cleanup into own patch] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-07-05chip: Add simics specific quirksMichael Neuling1-1/+2
Use that instead of mambo. Simics supports the F000F, so remove that quirk. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-06-20slw: Allow adding idle states to power-mgt node in mamboShreyas B. Prabhu1-2/+1
This patch removes the check which prevents adding any idle state to "power-mgt" node in mambo. Power8 exposes 3 idle states- nap, fast-sleep and deep-winkle. While fast-sleep depends on SCOMs and deep-winkle depends on SCOMs/SLW, nap has no such dependencies and it can be enabled in mambo. Current code checks for "fast-sleep" in hostboot provided "ibm,enabled-idle-states" dt node for adding fast-sleep and checks for presence of SLW for adding winkle to "power-mgt". Hence with this change only nap will be added to "power-mgt" node in mambo on Power8. On Power9, this patch enables all idle states which don't need SLW. Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-05-10Add base POWER9 supportMichael Neuling1-3/+9
Add PVR detection, chip id and other misc bits for POWER9. POWER9 changes the location of the HILE and attn enable bits in the HID0 register, so add these definitions also. Signed-off-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: Fix Numbus typo, hdata_to_dt build fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-03-07Enable Simics UART consoleRyan Grimm1-0/+4
The UART is a simulated ns16550 with memory mapped registers. A /simics dt node is detected and a SIMICS_QUIRK is added to chip quirks similar to MAMBO_CALLOUTS. It can contain an ns16550 dt node with a property console-bar. The LPC UART code is reused and this will work without an LPC bus in the model. Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-11-09Skip OCCs for chip that has occ_functional set to falseStewart Smith1-0/+5
In some simulation environments, we simulate a system close to an ibm-fsp system but with a crucial difference: we don't simulate OCCs. This means that for a P8 (well, a simulated one) that looks like it's part of a ibm-fsp system, we'd wait around for about a minute to be asked to start OCCs and for the OCCs to start. Obviously, this would never happen and we'd hit the OCC initialization timeout (correctly) logging an error. However, in this simulation environment, it isn't an error as the required information to work out it isn't an error is (at least now) provided in hdat under 'OCC Functional State'. Previously, the ibm,occ-functional-state property was just passed through the device tree to the host through the XSCOM node and skiboot ignored it. This patch takes note of occ-functional-state and skips waiting for OCCs on any chips that have been marked as having non functional OCC. In such simulation environments this means we: a) don't log an error that isn't really an error b) boot 1 minute quicker as we don't hit the timeout. Tested-by: Gajendra B Bandhu1 <gbandhu1@in.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-07-06core: Bound check get_chip()Benjamin Herrenschmidt1-0/+2
If get_chip() is called with a centaur chipID, return NULL rather than access beyond an array boundary Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-07-03plat/qemu: Add simple qemu platformBenjamin Herrenschmidt1-1/+1
This adds support for running under qemu "powernv" platform, which is currently available via the qemu repository at: https://github.com/ozbenh/qemu branch "powernv" qemu can't yet create DT entries for ISA devices so we hard wire the UART and RTC devices in the device-tree like we do with other platforms. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-06-19Support for Naples LPC serial interruptsBenjamin Herrenschmidt1-0/+1
This adds support for the HW SerIRQ deserializer of the P8 LPC bridge which is properly wired up on Naples. It also adds support for detecting and reporting LPC error interrupts on all P8s. On most platforms (Rhesus is the exception here due to the way it lets Linux handle the UART interrupts directly), we modify the device-tree to properly represent the LPC controller as a cascaded interrupt-controller and the "interrupts" property of LPC devices to contain the actual LPC interrupt number for the device. We add a mechanism for drivers to register specific LPC interrupts, and a "workaround" for pre-Naples P8 which platforms can use to call all of them for when the external FPGA based deserializer is used. There's also a callback on LPC resets which isn't used yet, we need a bit more work on the general LPC error handling, but it can be done a separate patches. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-02-18Replace is_mambo_chip with a better chip quirk mechanismBenjamin Herrenschmidt1-3/+11
And add some basic qemu quirks Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2014-12-01Add tweaks to work in Mambo simulatorBenjamin Herrenschmidt1-0/+5
Mambo doesn't implement various things such as PBA SCOMs, LPC, ChipTOD, etc... It also provides a special console hook. This adds detection of Mambo via the /mambo node, and enables us to boot all the way to Linux. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2014-11-12i2c: Use new timer facility and improve interrupts handlingBenjamin Herrenschmidt1-0/+1
We only poll the masters for the chip that got the interrupt and we improve the running of the timers as well. We user the new TIMER_POLL facility to replace the use of the OPAL poller, which simplifies the code further. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-02Initial commit of Open Source releaseBenjamin Herrenschmidt1-0/+85
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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