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2019-08-15mem-map: Setup memory for MDDT tableVasant Hegde2-4/+11
Each entry in MDST and MDDT takes 16 bytes. With 1K we can have upto 64 entries. This is sufficient to support OPAL MPIPL (memory preserving IPL). Presently OPAL reserves 2K memory for MDST table. Lets split this into two region of 1K for MDST and MDDT table. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-15hdata: Define various DUMP related structuresVasant Hegde3-1/+70
- MDDT is used by OPAL to pass destination memory details to hostboot. - MDRT is used by hostboot to pass post dump result table to OPAL. - Processor dump area is used to capture architected register data. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-15hdata: Split MDST 'type' field to accommodate MPIPLVasant Hegde3-11/+21
The MPIPL facility needs to store region and type information corresponding with each MDST entry. - data region : dump data regions (like DUMP_REGION_* ) - dump type : Reflects MDST entry usage (used by SYSDUMP -OR- FADUMP) The existing type field is currently not used by FSP and/or firmware, so it is safe to re-purpose it. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-15FSP/MDST: Rename fsp-mdst-table.c -> fsp-sysdump.cVasant Hegde4-12/+12
MDST is a ntuple inside SPIRAH. Its just a interface to pass memory ranges to be captured as part of dump to FSP/Hostboot. Today OPAL is using MDST ntuple to pass list of memory region (mostly OPAL console and host dmesg) to be collected as part of SYSDUMP. Soon we are going to support OPAL MPIPL feature (aka Memory Preserving IPL). Even MPIPL uses MDST/MDDT table. Hence rename files based on feature instead of some table name: - fsp-mdst-table.c -> fsp-sysdump.c - fsp-mdst-table.h -> opal-dump.h (This will cater both SYSDUMP and MPIPL) - Rename structure -> dump_mdst_table -> mdst_table This patch does renaming and header file adjustment. No functionality changes. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-15OPAL: Add OPAL boot entry address to device treeVasant Hegde1-0/+2
Needed for creating OPAL core file. Sample output: -------------- sys/firmware/devicetree/base/ibm,opal # lsprop ... opal-boot-address 00000000 30002560 ... Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02SPDX fixups and Copyright date fixesStewart Smith30-21/+52
Ensure the (C) who and years are correct, based on git history. Also a few SPDX fixups Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02doc/device-tree/ibm, opal/firmware/version: clarify timeline of git-id vs ↵Stewart Smith1-2/+6
version Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02doc/requirements.txt: pin docutils at 0.14Stewart Smith1-0/+2
docutils is a dependency for sphinx. The recently released 0.15 version throws a syntax error like so: + cd doc + make html sphinx-build -b html -d _build/doctrees . _build/html Traceback (most recent call last): File "/usr/bin/sphinx-build", line 6, in <module> from sphinx.cmd.build import main File "/usr/lib64/python2.7/site-packages/sphinx/cmd/build.py", line 20, in <module> from docutils.utils import SystemMessage File "/usr/lib/python2.7/site-packages/docutils/utils/__init__.py", line 21, in <module> import docutils.io File "/usr/lib/python2.7/site-packages/docutils/io.py", line 348 (self.destination.mode, mode)), file=self._stderr) ^ SyntaxError: invalid syntax make: *** [Makefile:53: html] Error 1 obviously, this isn't ideal - so let's pin our version to one that actually works. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02occ: Add pstate corresponding to base frequency to DTShilpasri G Bhat2-1/+13
Unlike POWER8, nominal frequency is not the highest guaranteed frequency of the POWER9 chip. In POWER9, the highest guaranteed frequency is greater than the nominal frequency and is referred to as base frequency. In POWER9 base frequency is the highest frequency the processor will operate at when ALL cores are active and in ANY operating condition. This patch exports the turbo pstate as the base frequency as per OCC documentation. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> [oliver: delete ibm,pstate-base on fast reboot] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02errorlog: Prevent alignment error building with gcc9.Michal Suchanek1-1/+1
Fixes this build error: [ 52s] hw/fsp/fsp-elog-write.c: In function 'opal_elog_read': [ 52s] hw/fsp/fsp-elog-write.c:213:12: error: taking address of packed member of 'struct errorlog' may result in an unaligned pointer value [-Werror=address-of-packed-member] [ 52s] 213 | list_del(&log_data->link); [ 52s] | ^~~~~~~~~~~~~~~ Fixes: https://github.com/open-power/skiboot/issues/247 Signed-off-by: Michal Suchanek <msuchanek@suse.de> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02hw/sbe-p9: Fix multi-line log messagesOliver O'Halloran1-3/+3
When sending messages to the SBE we log the message using a multi-line log message that looks like this: [ 96.390873752,8] SBE: Message queued [chip id = 0x0]: Reg0 : 000002010054d401 Reg1 : 0000000000030d40 Reg2 : 0000000000000000 Reg3 : 0000000000000000 The lack of a common prefix makes the log messages annoying to deal with since you can just grep for SBE: to get all the SBE related messages, and you can't use grep -v to remove them. There's no real benifit to squashing all this into a single prlog() call, so use a for loop to print the registers. With this patch the output is: [ 93.253511545,8] SBE: Message queued [chip id = 0x0]: [ 93.253512343,8] SBE: Reg0 : 000002010059d401 [ 93.253513167,8] SBE: Reg1 : 0000000000030d40 [ 93.253513894,8] SBE: Reg2 : 0000000000000000 [ 93.253514627,8] SBE: Reg3 : 0000000000000000 Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Acked-by: Stewart Smith <stewart@linux.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2019-08-02core/pci-quirk: Microsemi switch UR workaroundOliver O'Halloran3-0/+90
Some Microsemi switches have a bug where accessing an unimplemented config space register causes an Unsupported Request error. This is a violation of the PCI spec which requires devices to ignore writes and return 0x00 when an unimplemented config space register is accessed. Linux allows userspace to access all of config space and tools (e.g. lspci) will read the entire 4KB space. This results in flood of spurious EEH events since POWER chips treat URs as an indication of a malfunctioning device. This patch adds a PCI device quirk that scans the config space of the switch in early boot to determine what ranges will trigger a UR. With this information we can then use config filters to block accesses to the problematic ranges. This scanning process is a little slow, but: a) This bug should be resolved by a switch firmware update eventually, and b) System firmware updates might result PCIe capabilities being added or removed from the switch's config space. This means that we would have a cache invalidation problem which isn't straightforward to resolve. We can check if the workaround is needed at all by reading 0xFF (the end of the legacy config space) since we know the switch never has anything implemented for that address. Do the simple thing for now rather than trying to make it faster since this should be a temporary workaround. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-By: Alistair Popple <alistair@popple.id.au>
2019-08-02core/pci: Export pci_check_clear_freeze()Oliver O'Halloran2-5/+12
We'd like to be able to check when we get a freeze in the quirk handling code. Make pci_check_clear_freeze un-static so it can be used elsewhere. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-By: Alistair Popple <alistair@popple.id.au>
2019-08-02core/pci-quirk: Re-order struct membersOliver O'Halloran3-5/+5
Having the function first throws out the alignment on the VDID since the functions names are probably different lengths. Swap them ordering of the struct members so the VDID comes first to keep things tidy. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Stewart Smith <stewart@linux.ibm.com> Reviewed-by: Alistair Popple <alistair@popple.id.au>
2019-07-30Support BMC IPMI heartbeat commandAndrew Geissler1-0/+14
A few years ago, the OpenBMC code added support for a "heartbeat" command to send to the host. This command is used after the BMC is reset to check if the host is running. Support was never added to the host side however so currently when the BMC sends this command, this appears in the host console: IPMI: unknown OEM SEL command ff received There is no response needed by the host (other then the low level acknowledge of the command which already occurs). This commit handles the command so the error is no longer printed (does nothing with the command though since no action is needed). Here's the tested output of this patch in the host console (with debug enabled): IPMI: BMC issued heartbeat command: 00 Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
2019-07-30hw: Put SPDX on new filesOliver O'Halloran6-84/+18
Convert the npu3 files to use SPDX headers. Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26Makefiles: Remove --Wno-stringop-truncationOliver O'Halloran1-1/+0
To disable a warning you use the command line parameter: -Wno-<warning-name>, not --Wno-<warning-name> GCC seems to ignore parameters starting with a double dash, so we've been building with the stringop-trunction warning enabled for about a year now and no one has complained. Away it goes. Fixes: cd2b103f2488 ("Makefile: Check -Wno-stringop-truncation is supported") Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26travis: do gcov builds on fedora30Stewart Smith1-5/+3
We've fixed up gcov for newer GCC. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26travis: remove fedora29Stewart Smith5-42/+31
No need to keep old Fedora releases around. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26travis: Enable fedora30 for ppc64leStewart Smith1-2/+0
Back in ac734a084319 when we added fedora30, we were seeing weird failures on ppc64le. We no longer see them, so enforce fedora30 passing there. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26asm/head: set skiboot TOC in interrupt handler entryNicholas Piggin1-3/+5
Some code runs with r2 not set to the skiboot TOC, for example the secureboot CVC (see call_rom_entry). If a system reset or machine check is taken at this time, the skiboot interrupt handler will crash badly rather than report it. So set the skiboot TOC into r2 in the interrupt entry code. r2 is already saved and restored, so in the case of recoverable exceptions, this will restore the correct r2 when returning to such code. This issue was found by Stewart, and this patch is based on his initial fix, with some modification. Cc: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26Add Swift platformReza Arbab2-1/+142
Swift is a dual-chip Axone system, wired for four possible GPUs. This is akin to a POWER9P version of a (Redbud) Witherspoon. Add a platform definition for this system, using details from v1.1 of the design workbook (29 May 2019). Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26hw: Introduce npu3Reza Arbab12-10/+3667
POWER9P systems have been upgraded with NVLink 3.0 interconnects. The underlying hardware is fundamentally different--each POWER9 chip has (1 NPU) * (3 stacks) * (2 bricks) = (6 links) Where in each POWER9P chip, there are (3 NPUs) * (4 bricks) = (12 links) This flatter hierarchy simplifies the firmware implementation a bit, but also prevents sharing much common code with npu2. As in previous versions, initialize the hardware and expose each link to the OS as a virtual PCIe device. This initial support covers NVLink devices only, with OpenCAPI to follow. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26npu2: Add checks to npu2-only codepathsReza Arbab3-3/+11
To prepare for npu3, add a few checks in codepaths that are only for npu2. Compare against PVR_TYPE_P9, as npu3 will be in systems of PVR_TYPE_P9P (or greater). Alternatively, check for dt compatibility with "ibm,power9-npu" because npu3 will use "ibm,power9-npu3". Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26npu2: Refactor NPU OPAL callsReza Arbab4-132/+191
Abstract the OPAL entry points for npu2, moving them to a new file. This prepares us to add parallel npu3 versions of the same APIs. No functional change. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26npu2: Prepare purge_l2_l3_caches() for reuseReza Arbab5-152/+197
Move this to a separate compilation unit with its own header, for reuse. The code formerly in npu2.c is copied verbatim. The #defines formerly in npu2-regs.h have been reformatted and changed to use PPC_BITMASK() instead of multiple consecutive PPC_BIT()s. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26hw/phys-map: Add Axone memory mapReza Arbab3-3/+141
Add the physical memory map for Axone systems. According to 'make hw-check', there are no holes or overlapping regions. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Acked-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26hw/phys-map: Add pvr argument to phys_map_init()Reza Arbab5-8/+16
When new chip types are added, phys_map_init() will need to know which memory map it should use. Instead of directly checking PVR, make it an argument to the function, so that 'make hw-check' can test all the maps. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Acked-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26Dedup $(HW_OBJS)Reza Arbab1-4/+2
How did I notice one dup in aa56d9a2abdb ("Remove duplicate npu-common.o from $(HW_OBJS)"), but not the other five? Remove them too. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith469-5959/+1418
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26gard: fix installation ruleDan Horák1-2/+2
Use $(EXE) for the binary name instead of hard-coding. This completes the "gard: Use consistent name" change from commit 41109e5073bd ("gard: Use consistent name") Fixes: 41109e5073bd ("gard: Use consistent name") Signed-off-by: Dan Horák <dan@danny.cz> [oliver: prefix in title, fixes tag] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-23Updating shared constants for HBRTDan Crowell1-2/+69
Updated a few sets of constants for HBRT operation based on the most recent Hostboot implementation. - added all of the PIB return codes in for scom - added return cords for firmware_request and wakeup - added capability for 'clear all wakeups' Signed-off-by: Dan Crowell <dcrowell@us.ibm.com>
2019-07-19pci-slot: Allow to create slot for downstream port of any switchIlya Kuznetsov1-7/+2
System vendor may build systems with large PCIe tree with deeper switch topologies. Currenlty downstream ports slot creation is limited to first switch. Patch allows to use any. Signed-off-by: Ilya Kuznetsov <ilya@yadro.com> [oliver: added pci-slot prefix] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19Move ec/ code to Rhesus platformStewart Smith8-20/+3
The embedded controller that Rhesus uses is exclusive to that platform, make it purely part of tha platform Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19xscom-utils: refer only objects not sources for getscomDan Horák1-1/+1
The rule for getscom binary should depend on object files only, not sources. Signed-off-by: Dan Horák <dan@danny.cz> Signed-off-by: Than Ngo <than@redhat.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Stewart Smith <stewart@linux.ibm.com> [oliver: added xscom-utils prefix to subject] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19gcov: Fix skiboot size to dump out from simulatorsStewart Smith3-3/+3
We can be up to 5MB now, and have been for a while. Fixes: 7c9b3eb3c149843a27b9674e66b0227cf289a29a Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: libstb/container: fix endian type for magic numberStewart Smith1-1/+1
libstb/container.c:38:28: warning: incorrect type in argument 1 (different base types) libstb/container.c:38:28: expected restricted beint32_t [usertype] be_val libstb/container.c:38:28: got unsigned int [usertype] Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: hdata/spira sw_xstop_fir_bitpos is uint8_t, has no endianStewart Smith2-3/+3
hdata/spira.c:625:33: warning: incorrect type in argument 1 (different base types) hdata/spira.c:625:33: expected restricted beint32_t [usertype] be_val hdata/spira.c:625:33: got unsigned char [usertype] fir_bit hdata/spira.c:625:33: warning: incorrect type in argument 1 (different base types) hdata/spira.c:625:33: expected restricted beint32_t [usertype] be_val hdata/spira.c:625:33: got unsigned char [usertype] fir_bit Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: hdata/iohub: correctly convert endiannessStewart Smith1-1/+1
hdata/iohub.c:723:22: warning: restricted beint16_t degrades to integer Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: hdata/fsp: u8 doesn't have endianStewart Smith2-2/+2
hdata/fsp.c:271:9: warning: incorrect type in argument 1 (different base types) hdata/fsp.c:271:9: expected restricted beint32_t [usertype] be_val hdata/fsp.c:271:9: got unsigned char const [usertype] uart_int_number hdata/fsp.c:271:9: warning: incorrect type in argument 1 (different base types) hdata/fsp.c:271:9: expected restricted beint32_t [usertype] be_val hdata/fsp.c:271:9: got unsigned char const [usertype] uart_int_number Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: lpc uart interrupt pointer endiannessStewart Smith1-1/+1
hw/lpc-uart.c:674:47: warning: incorrect type in argument 1 (different base types) hw/lpc-uart.c:674:47: expected restricted beint32_t [usertype] be_val hw/lpc-uart.c:674:47: got unsigned int const [usertype] Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: various SPIRA structures, declare them.Stewart Smith1-0/+7
hdata/spira.c:42:49: warning: symbol 'proc_init_data' was not declared. Should it be static? hdata/spira.c:51:49: warning: symbol 'cpu_ctl_spat_area' was not declared. Should it be static? hdata/spira.c:54:49: warning: symbol 'cpu_ctl_hsr_area' was not declared. Should it be static? hdata/spira.c:56:53: warning: symbol 'cpu_ctl_init_data' was not declared. Should it be static? hdata/spira.c:92:48: warning: symbol 'init_mdst_table' was not declared. Should it be static? Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: fix endian types of struct imc_chip_cb membersStewart Smith1-6/+6
hw/imc.c:188:46: warning: incorrect type in assignment (different base types) hw/imc.c:188:46: expected unsigned long long [usertype] imc_chip_command hw/imc.c:188:46: got restricted beint64_t hw/imc.c:370:41: warning: incorrect type in argument 1 (different base types) hw/imc.c:370:41: expected restricted beint64_t [usertype] be_val hw/imc.c:370:41: got unsigned long long [usertype] imc_chip_avl_vector hw/imc.c:833:38: warning: incorrect type in assignment (different base types) hw/imc.c:833:38: expected unsigned long long [usertype] imc_chip_command hw/imc.c:833:38: got restricted beint64_t hw/imc.c:894:38: warning: incorrect type in assignment (different base types) hw/imc.c:894:38: expected unsigned long long [usertype] imc_chip_command hw/imc.c:894:38: got restricted beint64_t Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: fix (main|secondar)_cpu_entry declaration typesStewart Smith1-2/+2
core/init.c:923:28: error: symbol 'main_cpu_entry' redeclared with different type (originally declared at core/init.c:921) - different modifiers core/init.c:1314:28: error: symbol 'secondary_cpu_entry' redeclared with different type (originally declared at core/init.c:1312) - different modifiers Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19sparse: Silence "directive in argument list" for version stringStewart Smith1-7/+8
core/init.c:966:1: error: directive in argument list core/init.c:968:1: error: directive in argument list core/init.c:970:1: error: directive in argument list Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19Silence sparse warning for version.cStewart Smith2-0/+2
version.c:1:12: warning: symbol 'version' was not declared. Should it be static? Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19Add: add mihawk platform filejoy_chu2-1/+268
Signed-off-by: joy_chu <joy_chu@wistron.com> Acked-by: Stewart Smith <stewart@linux.ibm.com> [oliver: use SPDX for license; removed whitespace error] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-16skiboot v6.4 release notesv6.4Stewart Smith1-0/+850
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-07-16libflash: Fix broken continuationsOliver O'Halloran1-5/+5
Some of the libflash debug messages don't print a newlines at the end of the line and assume that the next print will be contigious with the last. This isn't true in skiboot since log messages are prefixed with a timestamp. This results in funny looking output such as: LIBFLASH: Verifying... LIBFLASH: reading page 0x01963000..0x01964000...[3.084846885,7] same ! LIBFLASH: reading page 0x01964000..0x01965000...[3.086164489,7] same ! Fix this by moving the "same !" debug message to a new line with the prefix "LIBFLASH: ..." to indicate it's a continuation of the last statement. First reported in https://github.com/open-power/skiboot/issues/51 Reported-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-07-15npu2-opencapi: Add opencapi support on ZZFrederic Barrat2-2/+103
This patch adds opencapi support on ZZ. It hard-codes the required device tree entries for the NPU and links. The alternative was to use HDAT, but it somehow proved too painful to do. The new device tree entries activate the npu2 init code on ZZ. On systems with no opencapi adapters, it should go unnoticed, as presence detection will skip link training. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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