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2018-07-11skiboot 6.1 release notesv6.1Stewart Smith1-0/+651
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-11skiboot 6.0.5 release notesStewart Smith1-0/+118
Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit 6da102053f99765d8c973805745e0255d44b3e57) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-10capi: Select the correct IODA table entry for the mbt cache.Christophe Lombard1-9/+9
With the current code, the capi mmio window is not correctly configured in the IODA table entry. The first entry (generally the non-prefetchable BAR) is overwrriten. This patch sets the capi window bar at the right place. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Reviewed-by: Vaibhav Jain <vaibhav@linux.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-10cpu: Ensure no-return flag is updated for current cpu_threadVaibhav Jain1-0/+2
Presently in case a cpu_thread queues a non returning job on itself, the variable cpu_thread.job_has_no_return is never updated and other cpu_threads can still queue a job on it without triggering any warnings. So this patch updates __cpu_queue_job() to ensure that job_has_no_return is updated on the current cpu_thread before it branches to the job->func(). So if the current job is non-returning then other cpu_threads queuing a job on this cpu will trigger a warning. This should aid in debugging some skiboot deadlocks. Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-10npu2/hw-procedures: Fence bricks via NTL instead of MISCReza Arbab1-24/+7
There are a couple of places we can set/unset fence for a brick: 1. MISC register: NPU2_MISC_FENCE_STATE 2. NTL register for the brick: NPU2_NTL_MISC_CFG1(ndev) Recent testing of ATS in combination with GPU reset has exposed a side effect of using (1); if fence is set for all six bricks, it triggers a sticky nmmu latch which prevents the NPU from getting ATR responses. This manifests as a hang in the tests. We have npu2_dev_fence_brick() which uses (1), and only two calls to it. Replace the call which sets fence with a write to (2). Remove the corresponding unset call entirely. It's unneeded because the procedures already do a progression from full fence to half to idle using (2). Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-04phb4/capp: Calculate STQ/DMA read engines based on link-width for PECVaibhav Jain2-9/+33
Presently in CAPI mode the number of STQ/DMA-read engines allocated on PEC2 for CAPP is fixed to 6 and 0-30 respectively irrespective of the PCI link width. These values are only suitable for x8 cards and quickly run out if a x16 card is plugged to a PEC2 attached slot. This usually manifests as CAPP reporting TLBI timeout due to these messages getting stalled due to insufficient STQs. To fix this we update enable_capi_mode() to check if PEC2 chiplet is in x16 mode and if yes then we allocate 4/0-47 STQ/DMA-read engines for the CAPP traffic. Cc: stable # v5.7+ Fixes: 37ea3cfdc852("capi: Enable capi mode for PHB4") Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-04occ: sensors: Fix the size of the phandle array 'sensors' in DTShilpasri G Bhat1-2/+2
Fixes: 99505c03f493 ("sensor-groups: occ: Add support to disable/enable sensor group") Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-04core: always flush console before stoppingNicholas Piggin2-2/+6
This catches a few cases (e.g., fast reboot failure messages) that don't always make it to the console before the machine is rebooted. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-04core/cpu: parallelise global CPU register setting jobsNicholas Piggin1-10/+37
On a 176 thread system, before: [ 122.319923233,5] OPAL: Switch to big-endian OS [ 126.317897467,5] OPAL: Switch to little-endian OS after: [ 212.439299889,5] OPAL: Switch to big-endian OS [ 212.469323643,5] OPAL: Switch to little-endian OS Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03phb4: Delay training till after PERST is deassertedMichael Neuling1-0/+14
This helps some cards train on the second PERST (ie fast-reboot). The reason is not clear why but it helps, so YOLO! Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03phb4: Move training trace logging to next state.Michael Neuling1-2/+2
I'm going to defer training to this state soon, so move the tracing first. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03phb4: Minimise wait when moving through FRESET statesMichael Neuling1-1/+1
We want to get through this as fast as possible so minimise by removing msecs_to_tb() call. Changes number passed from 512 -> 1. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03occ: Update Dynamic Data comment block with new GPU presence fieldsAndrew Donnellan1-0/+5
Document new GPU presence fields in the comment block next to struct occ_dynamic_data. Fixes: 9b394a32c8ea ("occ: Add support for GPU presence detection") Suggested-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03npu2: Use same compatible string for NVLink and OpenCAPI link nodes in ↵Andrew Donnellan7-16/+46
device tree Currently, we distinguish between NPU links for NVLink devices and OpenCAPI devices through the use of two different compatible strings - ibm,npu-link and ibm,npu-link-opencapi. As we move towards supporting configurations with both NVLink and OpenCAPI devices behind a single NPU, we need to detect the device type as part of presence detection, which can't happen until well after the point where the HDAT or platform code has created the NPU device tree nodes. Changing a node's compatible string after it's been created is a bit ugly, so instead we should move the device type to a new property which we can add to the node later on. Get rid of the ibm,npu-link-opencapi compatible string, add a new ibm,npu-link-type property, and a helper function to check the link type. Add an "unknown" device type in preparation for later patches to detect device type dynamically. These device tree bindings are entirely internal to skiboot and are not consumed directly by Linux, so this shouldn't break anything (other than internal BML lab environments). Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27pmem: volatile bindings for the poorly enabledBalbir singh1-0/+26
PMEM_DISK bindings were added, but they rely on a rather recent mmap feature. This patch steals from those bindings to add volatile bindings. I've used these bindings with PMEM_VOLATILE to launch an instance with the publicly available systemsim-p9. The bindings are volatile and one should not expect any data to be saved/retrieved. Signed-off-by: Balbir singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27occ: Add support for GPU presence detectionAndrew Donnellan2-3/+24
On the Witherspoon platform, we need to distinguish between NVLink GPUs and OpenCAPI accelerators. In order to do this, we first need to find out whether the SXM2 socket is populated. On Witherspoon, the SXM2 socket's presence detection pin is only visible via I2C from the APSS, and thus can only be exposed to the host via the OCC. The OCC, per OCC Firmware Interface Specification for POWER9 version 0.22, now exposes this to skiboot through a field in the dynamic data shared memory. Add the necessary dynamic data changes required to read the version and GPU presence fields. Add a function, occ_get_gpu_presence(), that can be used to check GPU presence. If the OCC isn't reporting presence (old OCC firmware, or some other reason), we default to assuming there is a device present and wait until link training to fail. This will be used in later patches to fix up the NPU2 probe path for OpenCAPI support on Witherspoon. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27occ: Move occ declarations into occ.hAndrew Donnellan11-29/+41
OCC declarations are currently split between skiboot.h and occ-sensor.h. Given the growing unwieldyness of skiboot.h it's probably time to move it all into one header. Rename occ-sensor.h to occ.h, move all OCC-related declarations out of skiboot.h, and add #includes as necessary. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27init, occ: Initialise OCC earlier on BMC systemsAndrew Donnellan1-1/+13
We need to use the OCC to obtain presence data for the SXM2 slots on Witherspoon systems. This is needed to determine device type for NVLink GPUs and OpenCAPI devices which can be plugged into the same slot. Support for this will be implemented in a future patch. Currently, OCC initialisation is done just before handing over to Linux, which is well after NPU probe. On FSP systems, OCC boot starts very late, so we wait until the last possible moment to initialise the skiboot side in order to give it the maximum time to boot. On BMC systems, OCC boot starts earlier, so there aren't any issues in moving it earlier in the skiboot init sequence. When running on a BMC machine, call occ_pstates_init() as early as possible in the init sequence. On FSP machines, continue to call it from its current location. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27slw: Fix trivial typo in debug messageAndrew Donnellan1-1/+1
s/goint/going/ Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27hw/npu2, core/hmi: Use NPU instead of NPU2 as log message prefixAndrew Donnellan2-11/+11
The NPU2{DBG,INF,ERR} macros use "NPU%d" as a prefix to identify messages relating to a particular NPU. It's slightly confusing to have per-NPU messages prefixed with "NPU0" or "NPU1" and NPU-generic messages prefixed with "NPU2". On some future system we could potentially have a NPU #2 in which case it'd be really confusing. Use NPU rather than NPU2 for NPU-generic log messages. There's no risk of confusion with the original npu.c code since that's only for P8. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27vpd: Add vendor property to processor nodeVasant Hegde3-0/+19
Processor FRU vpd doesn't contain vendor detail. We have to parse module VPD to get vendor detail. Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27vpd: Sanitize VPD dataVasant Hegde3-24/+51
On OpenPower system, VPD keyword size tells us the maximum size of the data. But they fill trailing end with space (0x20) instead of NULL. Also spec doesn't stop user to have space (0x20) within actual data. This patch discards trailing spaces before populating device tree. Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [stewart: fixup make check] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27test/qemu: start building qemu again, and use our built qemu for testsStewart Smith4-16/+17
We need to use QEMU_BIN rather than QEMU as the makefiles define QEMU already. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-26opal-ci: qemu: Use the powernv-3.0 branchJoel Stanley1-1/+1
This is based off the current development version of Qemu, and importantly it contains the patch that allows skiboot and Linux to clear the PCR that we require to boot. Signed-off-by: Joel Stanley <joel@jms.id.au> [stewart: use the open-power/qemu.git tree for prosterity] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-22skiboot v6.1-rc1 release notesv6.1-rc1Stewart Smith1-0/+466
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18astbmc: Enable mbox depending on scratch regJoel Stanley3-2/+18
P8 boxes can opt in for mbox pnor support if they set the scratch register bit to indicate it is supported. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18ast-bmc: Document BMC scratch registerJoel Stanley1-0/+20
ASPEED BMCs use SIO register 0x29 to configure host firmwrae settings. This documents those setings as currently used by Hostboot in [1]. Despite the naming, these settings are relevant for ast2500 systems as well. [1] src/usr/initservice/bootconfig/bootconfig_ast2400.H Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18psi: Properly mask errors in SEMRJoel Stanley1-1/+1
It looks like this code intended to read PSIHB SEMR, mask out some of the values, and write it back. Instead it writes the mask to the register. Found using scan-build. Fixes: 39addc6a0f1f ("PSI: Reorganize PSI link down handling code") Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18hdata: Remove hn variable where it is unusedJoel Stanley1-6/+5
Whatever this was used for appears to pre-date the public release of skiboot. Found using scan-build. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18timebase: Remove unused remaining time calculationJoel Stanley1-1/+0
In db9c1422002c ("Improve cpu_idle when PM is disabled") the time_wait_poll calculation was modified to calculate the remaining time on each loop. Because of this we don't need to decrement remaining any more. Found by scan-build. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18occ-sensor: Avoid using uninitialised struct cpu_threadJoel Stanley1-2/+4
When adding the sensors in occ_sensors_init, if the type is not OCC_SENSOR_LOC_CORE, then the loop to find 'c' will not be executed. Then c->pir is used for both of the the add_sensor_node calls below. This provides a default value of 0 instead. Found using scan-build. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18Move include lock.h to fsp-console.h from console.hStewart Smith2-1/+1
It's only used there, let's minimise our needed includes. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18Split debug_descriptor out into own include fileStewart Smith8-35/+61
We only touch it in limited places, let's simplify skiboot.h Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18ipmi-sel: use opal_booting() over poking at debug descriptorStewart Smith1-4/+2
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18fast-reboot: Disable on FSP IPL side changeVasant Hegde2-0/+27
If FSP changes next IPL side, then disable fast reboot. sample output: [ 620.196442259,5] FSP: Got sysparam update, param ID 0xf0000007 [ 620.196444501,5] CUPD: FW IPL side changed. Disable fast reboot [ 620.196445389,5] CUPD: Next IPL side : perm Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18npu2: Reset NVLinks on hot resetAlexey Kardashevskiy1-0/+14
This effectively fences GPU RAM on GPU reset so the host system does not have to crash every time we stop a KVM guest with a GPU passed through. Suggested-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18plat/qemu: add PNOR supportCédric Le Goater1-0/+10
To access the PNOR, OPAL/skiboot drives the BMC SPI controller using the iLPC2AHB device of the BMC SuperIO controller and accesses the flash contents using the LPC FW address space on which the PNOR is remapped. The QEMU PowerNV machine now integrates such models (SuperIO controller, iLPC2AHB device) and also a pseudo Aspeed SoC AHB memory space populated with the SPI controller registers (same model as for ARM). The AHB window giving access to the contents of the BMC SPI controller flash modules is mapped on the LPC FW address space. The change should be compatible for machine without PNOR support. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18external/xscom-utils: Add python library for xscom accessMadhavan Srinivasan1-0/+312
Patch adds a simple python library module for xscom access. It directly manipulate the '/access' file for scom read and write from debugfs 'scom' directory. Example on how to generate a getscom using this module: #!/usr/bin/python from adu_scoms import * getscom = GetSCom() getscom.parse_args() getscom.run_command() Sample output for above getscom.py: # ./getscom.py -l Chip ID | Rev | Chip type ---------|-------|----------- 00000008 | DD2.0 | P9 (Nimbus) processor 00000000 | DD2.0 | P9 (Nimbus) processor Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18libflash: quieten our loggingStewart Smith3-4/+2
Suggested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18hw/bt.c: quieten all the noisy BT/IPMI messagesStewart Smith1-4/+4
Suggested-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Yeah-boiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiied-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18Blockchain isn't the only data structure deserving of loveStewart Smith1-1/+1
Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Acked-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18p8-i2c: fix wrong request status when a reset is neededFrederic Barrat1-3/+6
If the bus is found in error state when starting a new request, the engine is reset and we enter recovery. However, once complete, the reset operation shows a status of complete in the status register. So any badly-timed called to check_status() will think the current top request is complete, even though it hasn't run yet. So don't update any request status while we are in recovery, as nothing useful for the request is supposed to happen in that state. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18NX: Add NX coprocessor init opal callHaren Myneni5-1/+106
The read offset (4:11) in Receive FIFO control register is incremented by FIFO size whenever CRB read by NX. But the index in RxFIFO has to match with the corresponding entry in FIFO maintained by VAS in kernel. VAS entry is reset to 0 when opening the receive window during driver initialization. So when NX842 is reloaded or in kexec boot, possibility of mismatch between RxFIFO control register and VAS entries in kernel. It could cause CRB failure / timeout from NX. This patch adds nx_coproc_init opal call for kernel to initialize readOffset (4:11) and Queued (15:23) in RxFIFO control register. Fixes: 3b3c5962f432 ("NX: Add P9 NX support for 842 compression engine") CC: stable # v5.8+ Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18npu2-opencapi: reduce number of retries to train the linkFrederic Barrat1-1/+1
We've been reliably training the opencapi link on the first attempt for quite a while. Furthermore, if it doesn't train on the first attempt, retries haven't been that useful. So let's reduce the number of attempts we do to train the link. 2 retries = 3 attempts to train. Each (failed) training sequence costs about 3 seconds. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18core: Add test for PCI quirksAndrew Jeffery3-4/+75
Ensure that quirks are run (or not) for given PCI vendor and device IDs. This tests the quirk infrastructure and the PCI_VENDOR_ID() and PCI_DEVICE_ID() macros, the latter of which was recently found to be broken. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18pci: Fix PCI_DEVICE_ID()Andrew Jeffery1-1/+1
The vendor ID is 16 bits not 8. This error leaves the top of the vendor ID in the bottom bits of the device ID, which resulted in e.g. a failure to run the PCI quirk for the AST VGA device. Fixes: 2b841bf0ef1b ("core/pci: Use cached vendor/device IDs in quirks") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-05Quieten console output on bootStewart Smith11-15/+15
We print out a whole bunch of things on boot, most of which aren't interesting, so we should *not* print them instead. Printing things like what CPUs we found and what PCI devices we found *are* useful, so continue to do that. But we don't need to splat out a bunch of things that are always going to be true. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-05libflash: fix gcov buildStewart Smith1-1/+1
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-04opal/hmi: Display correct chip id while printing NPU FIRs.Mahesh Salgaonkar1-4/+4
HMIs for NPU xstops are broadcasted to all chips. All cores on all the chips receive HMI. HMI handler correctly identifies and extracts the NPU FIR details from affected chip, but while printing FIR data it prints chip id and location code details of this_cpu()->chip_id which may not be correct. This patch fixes this issue. CC: stable # v6.0+ Fixes: 7bcbc78c ("Add location code to NPU2 HMI logging") Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> [stewart: add fixes and cc stable] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-04ipmi-watchdog: Support handling re-initializationWilliam A. Kennington III1-5/+42
Watchdog resets can return an error code from the BMC indicating that the BMC watchdog was not initialized. Currently we abort skiboot due to a missing error handler. This patch implements handling re-initialization for the watchdog, automatically saving the last watchdog set values and re-issuing them if needed. Signed-off-by: William A. Kennington III <wak@google.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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