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2017-06-15phb4: Error injection for config spaceRussell Currey1-1/+181
Implement CFG (config space) error injection. This works the same as PHB3. MMIO and DMA error injection require a rewrite, so they're unsupported for now. While it's not feature complete, this at least provides an easy way to inject an error that will trigger EEH. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15phb4: Error clear implementationRussell Currey1-68/+57
In PHB3 there were separate recovery procedures depending on the class of error. PHB4 performs almost exactly the same steps in recovering from any class of error, so change phbX_err_ER_clear() to phbX_err_clear() for this implementation. Since the same sequence gets used, call this function in phb4_creset() - which is used to handle fatal (fence) errors - where it was not called in previous hardware revisions. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15phb4: Mask link down errors during resetRussell Currey2-0/+10
During a hot reset the PCI link will drop, so we need to mask link down events to prevent unnecessary errors. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15phb4: Implement root port initializationRussell Currey1-6/+11
phb4_root_port_init() was a NOP before, so fix that. Nothing PHB4-specific here. Something may be required in future. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15phb4: Complete reset implementationRussell Currey2-2/+44
This implements complete reset (creset) functionality for POWER9 DD1. Only partially tested and contends with some DD1 errata, but it's a start. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15chip: Print out when we initialise a chipMichael Ellerman1-0/+1
Print out when we initialise a chip and which node we initialised it from, purely for informational porpoises. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15core: Move enable_mambo_console() into chip initialisationMichael Ellerman3-6/+5
Rather than having a wart in main_cpu_entry() that initialises the mambo console, we can move it into init_chips() which is where we discover that we're on mambo. This also means we don't need to check the quirk again, and has the added bonus that an assert in chip initialisation (which follows immediately) will actually produce output. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> [stewart@linux.vnet.ibm.com: fix make check by adding no-op stub] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14mambo: Create multiple chips when we have multiple CPUsMichael Ellerman1-1/+11
Currently when we boot mambo with multiple CPUs, we create multiple CPU nodes in the device tree, and each claims to be on a separate chip. However we don't create multiple xscom nodes, which means skiboot only knows about a single chip, and all CPUs end up on it. At the moment mambo is not able to create multiple xscom controllers. We can create fake ones, just by faking the device tree up, but that seems uglier than this solution. So create a mambo-chip for each CPU other than 0, to tell skiboot we want a separate chip created. This then enables Linux to see multiple chips: smp: Brought up 2 nodes, 2 CPUs numa: Node 0 CPUs: 0 numa: Node 1 CPUs: 1 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14chip: Add support for discovering chips on mamboMichael Ellerman1-0/+5
Currently the only way for skiboot to discover chips is by looking for xscom nodes. But on mambo it's currently not possible to create multiple xscom nodes, which means we can only simulate a single chip system. However it seems we can fairly cleanly add support for a special mambo chip node, and use that to instantiate multiple chips. Add a check in init_chip() that we're not clobbering an already initialised chip, now that we have two places that initialise chips. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14chip: Factor out chip inititialisationMichael Ellerman1-21/+29
Move the chip initialisation logic into a function, so we can call it from elsewhere in future. Only change to the logic is that we don't insert the chip into chips[] until we've finished initialising it. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14Add skiboot-5.4.6 release notesStewart Smith1-0/+117
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> (cherry picked from commit cf81313413067463d312198b7bf74c654a8f4396) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP/CONSOLE: Workaround for unresponsive ipmi daemonVasant Hegde2-1/+20
We use TCE mapped area to write data to console. Console header (fsp_serbuf_hdr) is modified by both FSP and OPAL (OPAL updates next_in pointer in fsp_serbuf_hdr and FSP updates next_out pointer). Kernel makes opal_console_write() OPAL call to write data to console. OPAL write data to TCE mapped area and sends MBOX command to FSP. If our console becomes full and we have data to write to console, we keep on waiting until FSP reads data. In some corner cases, where FSP is active but not responding to console MBOX message (due to buggy IPMI) and we have heavy console write happening from kernel, then eventually our console buffer becomes full. At this point OPAL starts sending OPAL_BUSY_EVENT to kernel. Kernel will keep on retrying. This is creating kernel soft lockups. In some extreme case when every CPU is trying to write to console, user will not be able to ssh and thinks system is hang. If we reset FSP or restart IPMI daemon on FSP, system recovers and everything becomes normal. This patch adds workaround to above issue by returning OPAL_HARDWARE when cosole is full. Side effect of this patch is, we may endup dropping latest console data. But better to drop console data than system hang. Alternative approach is to drop old data from console buffer, make space for new data. But in normal condition only FSP can update 'next_out' pointer and if we touch that pointer, it may introduce some other race conditions. Hence we decided to just new console write request. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP: Set status field in response message for timed out messageVasant Hegde1-1/+4
For timed out FSP messages, we set message status as "fsp_msg_timeout". But most FSP driver users (like surviellance) are ignoring this field. They always look for FSP returned status value in callback function (second byte in word1). So we endup treating timed out message as success response from FSP. Sample output: [69902.432509048,7] SURV: Sending the heartbeat command to FSP [70023.226860117,4] FSP: Response from FSP timed out, word0 = d66a00d7, word1 = 0 state: 3 .... [70023.226901445,7] SURV: Received heartbeat acknowledge from FSP [70023.226903251,3] FSP: fsp_trigger_reset() entry Here SURV code thought it got valid response from FSP. But actually we didn't receive response from FSP. This patch fixes above issue by updating status field in response structure. CC: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP: Improve timeout messageVasant Hegde1-4/+5
Presently we print word0 and word1 in error log. word0 contains sequence number and command class. One has to understand word0 format to identify command class. Lets explicitly print command class, sub command etc. CC: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP/RTC: Remove local fsp_in_reset variableVasant Hegde1-10/+0
Now that we are using fsp_in_rr() to detect FSP reset/reload, fsp_in_reset become redundant. Lets remove this local variable. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP/RTC: Fix possible FSP R/R issue in rtc write pathVasant Hegde1-9/+11
fsp_opal_rtc_write() checks FSP status before queueing message to FSP. But if FSP R/R starts before getting response to queued message then we will continue to return OPAL_BUSY_EVENT to host. In some extreme condition host may experience hang. Once FSP is back we will repost message, get response from FSP and return OPAL_SUCCES to host. This patch caches new values and returns OPAL_SUCCESS if FSP R/R is happening. And once FSP is back we will send cached value to FSP. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14hw/fsp/rtc: read/write cached rtc tod on fsp hir.ppaidipe@linux.vnet.ibm.com1-2/+2
Currently fsp-rtc reads/writes the cached RTC TOD on an fsp reset. Use latest fsp_in_rr() function to properly read the cached rtc value when fsp reset initiated by the hir. Below is the kernel trace when we set hw clock, when hir process starts. [ 1727.775824] NMI watchdog: BUG: soft lockup - CPU#57 stuck for 23s! [hwclock:7688] [ 1727.775856] Modules linked in: vmx_crypto ibmpowernv ipmi_powernv uio_pdrv_genirq ipmi_devintf powernv_op_panel uio ipmi_msghandler powernv_rng leds_powernv ip_tables x_tables autofs4 ses enclosure scsi_transport_sas crc32c_vpmsum lpfc ipr tg3 scsi_transport_fc [ 1727.775883] CPU: 57 PID: 7688 Comm: hwclock Not tainted 4.10.0-14-generic #16-Ubuntu [ 1727.775883] task: c000000fdfdc8400 task.stack: c000000fdfef4000 [ 1727.775884] NIP: c00000000090540c LR: c0000000000846f4 CTR: 000000003006dd70 [ 1727.775885] REGS: c000000fdfef79a0 TRAP: 0901 Not tainted (4.10.0-14-generic) [ 1727.775886] MSR: 9000000000009033 <SF,HV,EE,ME,IR,DR,RI,LE> [ 1727.775889] CR: 28024442 XER: 20000000 [ 1727.775890] CFAR: c00000000008472c SOFTE: 1 GPR00: 0000000030005128 c000000fdfef7c20 c00000000144c900 fffffffffffffff4 GPR04: 0000000028024442 c00000000090540c 9000000000009033 0000000000000000 GPR08: 0000000000000000 0000000031fc4000 c000000000084710 9000000000001003 GPR12: c0000000000846e8 c00000000fba0100 [ 1727.775897] NIP [c00000000090540c] opal_set_rtc_time+0x4c/0xb0 [ 1727.775899] LR [c0000000000846f4] opal_return+0xc/0x48 [ 1727.775899] Call Trace: [ 1727.775900] [c000000fdfef7c20] [c00000000090540c] opal_set_rtc_time+0x4c/0xb0 (unreliable) [ 1727.775901] [c000000fdfef7c60] [c000000000900828] rtc_set_time+0xb8/0x1b0 [ 1727.775903] [c000000fdfef7ca0] [c000000000902364] rtc_dev_ioctl+0x454/0x630 [ 1727.775904] [c000000fdfef7d40] [c00000000035b1f4] do_vfs_ioctl+0xd4/0x8c0 [ 1727.775906] [c000000fdfef7de0] [c00000000035bab4] SyS_ioctl+0xd4/0xf0 [ 1727.775907] [c000000fdfef7e30] [c00000000000b184] system_call+0x38/0xe0 [ 1727.775908] Instruction dump: [ 1727.775909] f821ffc1 39200000 7c832378 91210028 38a10020 39200000 38810028 f9210020 [ 1727.775911] 4bfffe6d e8810020 80610028 4b77f61d <60000000> 7c7f1b78 3860000a 2fbffff4 This is found when executing the testcase https://github.com/open-power/op-test-framework/blob/master/testcases/fspresetReload.py With this fix ran fsp hir torture testcase in the above test which is working fine. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-14FSP/CHIPTOD: Return false in error pathVasant Hegde1-0/+1
CC: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-09gitignore: Add compile_commands.jsonRussell Currey1-0/+1
compile_commands.json is a compilation database used by Clang and some tagging magic tools. There's a tool called `bear` which intercepts the compiler and creates this database of how every file is compiled. This enables my editor to highlight which #ifdef blocks actually get compiled, for example. Used by rtags: https://github.com/Andersbakken/rtags Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-09Add skiboot-5.4.5 release notesStewart Smith1-0/+56
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> (cherry picked from commit df2984393d40221b6d963839f4885d8fb8f4ce27) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08opal-prd: Handle SBE passthrough message passingVasant Hegde1-0/+24
This patch adds support to send SBE pass through command to HBRT. HBRT interface details provided by Daniel M. Crowell (<dcrowell@us.ibm.com>). CC: Daniel M Crowell <dcrowell@us.ibm.com> CC: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08SBE: Add passthrough command supportVasant Hegde7-2/+116
SBE sends passthrough command. We have to capture this interrupt and send event to HBRT via opal-prd (user space daemon). This patch adds minimal SBE code to capture SBE interrupt and send event to opal-prd. Next patch will add opal-prd (user space) support. CC: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08mambo: fix cpio/initramfs reservationStewart Smith1-0/+1
We didn't init cpio_size in the no cpio case. Fixes: 52aed80bddd5eed94c537f2bb0b846e4b5683728 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08mambo: Add a reservation for the initramfsOliver O'Halloran1-0/+5
On most systems the initramfs is loaded inside the part of memory reserved for the OS [0x0-0x30000000] and skiboot will never touch it. On mambo it's loaded at 0x80000000 and if you're unlucky skiboot can allocate over the top of it and corrupt the initramfs blob. There might be the downside that the kernel cannot re-use the initramfs memory since it's marked as reserved, but the kernel might also free it anyway. Fixes: 65612f120735 Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Tested-by: Michael Ellerman <mpe@ellerman.id.au> [stewart@linux.vnet.ibm.com: add Fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08FSP/CONSOLE: Do not free fsp_msg in error pathVasant Hegde1-1/+0
.. as we reuse same msg to send next output message. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08FSP/CONSOLE: Remove __unused attribute from fsp_console_read()Vasant Hegde1-1/+1
..as we use buffer to copy data. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08specfile: Update specfileVasant Hegde1-9/+6
Various update to spec file. - Update to latest version - Remove additional redundant sources - include pflash in opal-utils package - s/README/README.md/g Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08platform/zz: Acknowledge OCC_LOAD mbox message in ZZShilpasri G Bhat2-3/+22
In P9 FSP box, OCC image is pre-loaded. So do not handle the load command and send SUCCESS to FSP on recieving OCC_LOAD mbox message. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08FSP/RTC: Improve error logVasant Hegde1-1/+1
.. it makes easy to differentiate errors. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-07phb4: Activate shared PCI slot on witherspoonFrederic Barrat6-1/+113
Witherspoon systems come with a 'shared' PCI slot: physically, it looks like a x16 slot, but it's actually two x8 slots connected to two PHBs of two different chips. Taking advantage of it requires some logic on the PCI adapter. Only the Mellanox CX5 adapter is known to support it at the time of this writing. This patch enables support for the shared slot on witherspoon if a x16 adapter is detected. Each x8 slot has a presence bit, so both bits need to be set for the activation to take place. Slot sharing is activated through a gpio. Note that there's no easy way to be sure that the card is indeed a shared-slot compatible PCI adapter and not a normal x16 card. Plugging a normal x16 adapter on the shared slot should be avoided on witherspoon, as the link won't train on the second slot, resulting in a timeout and a longer boot time. Only the first slot is usable and the x16 adapter will end up using only half the lines. If the PCI card plugged on the physical slot is only x8 (or less), then the presence bit of the second slot is not set, so this patch does nothing. The x8 (or less) adapter should work like on any other physical slot. Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: re-org code, move into platform file] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-07doc: Fix output of version string when using Sphinx with Python 3Andrew Donnellan1-2/+2
Our Sphinx configuration gets the current skiboot version by using the subprocess module to run make_version.sh. In Python 2, this returns a value of type str, but in Python 3, this returns bytes instead. Decode those bytes into a string so we see "skiboot 5.6.blah" rather than "skiboot b'5.6.blah\n'" in the documentation output. Tested using Sphinx with both Python 2 and 3. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-07Disable nap on P8 Mambo, public release has bugsStewart Smith1-0/+4
Fixes: 9567e18728d0559bc5f79ea927d684dc3b1e3555 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-07PCI: only wait 20ms for PHB logic to settle if we detected any PHBsStewart Smith1-1/+6
Otherwise, in simulators such as Mambo, we needlessly wait 20ms, which takes much longer than 20ms to do, because simulator. Fixes: 41b14f9452c25f3dd74a8304763a3cc58bff019f Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-07p8-i2c OCC lock: fix locking in p9_i2c_bus_owner_changeStewart Smith1-2/+4
Fixes: c5fa0d718e9cda8999dcb83088118a7ea61814c5 Reported-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06Convert important polling loops to spin at lowest SMT priorityNicholas Piggin5-6/+22
The pattern of calling cpu_relax() inside a polling loop does not suit the powerpc SMT priority instructions. Prefrred is to set a low priority then spin until break condition is reached, then restore priority. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [stewart@linux.vnet.ibm.com: fixup lpc-uart wait_tx_room() and unit test] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06Improve cpu_idle when PM is disabledNicholas Piggin4-39/+61
Split cpu_idle() into cpu_idle_delay() and cpu_idle_job() rather than requesting the idle type as a function argument. Have those functions provide a default polling (non-PM) implentation which spin at the lowest SMT priority. This moves all the decrementer delay code into the CPU idle code rather than the caller. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06cpu: Introduce smt_lowest()Nicholas Piggin5-9/+10
Recent CPUs have introduced a lower SMT priority. This uses the Linux pattern of executing priority nops in descending order to get a simple portable way to put the CPU into lowest SMT priority. Introduce smt_lowest() and use it in place of smt_very_low and smt_low ; smt_very_low sequences. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06pci: Wait 20ms before checking presence detect on PCIeBenjamin Herrenschmidt1-0/+5
As the PHB presence logic has a debounce timer that can take a while to settle. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06phb4: Block D-state power management on direct slotsBenjamin Herrenschmidt3-4/+43
As current revisions of PHB4 don't properly handle the resulting L1 link transition. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06phb4: Remove long unused CFG_4B_WORKAROUNDBenjamin Herrenschmidt1-37/+0
This was used for early broken simulators Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06phb4: Call pci config filtersBenjamin Herrenschmidt1-0/+12
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06pci: Make handling of config filters genericBenjamin Herrenschmidt3-28/+30
Move phb3_pcicfg_filter() to pci.c, rename it to pci_handle_cfg_filters() Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06phb3: Turn the link speed hack into a cfg filterBenjamin Herrenschmidt1-10/+25
Rather than special casing it openly. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06phb3+iov: Fixup support for config space filtersBenjamin Herrenschmidt2-21/+24
The filter should be called before the HW access and its return value control whether to perform the access or not Also fix the pci-iov.c return values to match accordingly otherwise this breaks SR-IOV Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06pci: Add bitmap to know if a pci device has cfg reg filtersBenjamin Herrenschmidt4-7/+17
This avoids doing a search through the list of all devices on every config space access to every device under a PHB. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06mambo: Make xscom claim to be DD 2.0Michael Ellerman1-1/+1
In the mambo tcl we set the CPU version to DD 2.0, because mambo is not bug compatible with DD 1. But in xscom_read_cfam_chipid() we have a hard coded value, to work around the lack of the f000f register, which claims to be P9 DD 1.0. This doesn't seem to cause crashes or anything, but at boot we do see: [ 0.003893084,5] XSCOM: chip 0x0 at 0x1a0000000000 [P9N DD1.0] So fix it to claim that the xscom is also DD 2.0 to match the CPU. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06mambo: Match whole string when looking up symbols with linsym/skisymMichael Ellerman1-2/+2
linsym/skisym use a regex to match the symbol name, and accepts a partial match against the entry in the symbol map, which can lead to somewhat confusing results, eg: systemsim % linsym early_setup 0xc000000000027890 systemsim % linsym early_setup$ 0xc000000000aa8054 systemsim % linsym early_setup_secondary 0xc000000000027890 I don't think that's the behaviour we want, so append a $ to the name so that the symbol has to match against the whole entry, eg: systemsim % linsym early_setup 0xc000000000aa8054 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Tested-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06npu2: Fix npu2_{read,write}_4b()Reza Arbab3-8/+10
When writing or reading 4-byte values, we need to use the upper half of the 64-bit SCOM register. Fix npu2_{read,write}_4b() and their callers to use uint32_t, and appropriately shift the value being written or returned. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06p8-i2c: occ: Add support for OCC to use I2C enginesShilpasri G Bhat3-0/+154
This patch adds support to share the I2C engines with host and OCC. OCC uses I2C engines to read DIMM temperatures and to communicate with GPU. OCC Flag register is used for locking between host and OCC. Host requests for the bus by setting a bit in OCC Flag register. OCC sends an interrupt to indicate the change in ownership. Originally-from: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: Pretty heavily rework logic, including fixing bus owner change and separating out occ lock from sensor cache] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06hw/npu2.c: Fix opal_npu_map_lpar to search for existing BDFAlistair Popple1-2/+2
opal_npu_map_lpar is used to setup mappings for a given GPU BDF to handle XTS address translation requests. This call was incorrectly searching for existing mappings based on lparid instead of bdf resulting in table entries being incorrectly overwritten. This call should instead search for existing mappings to update using the GPU BDF. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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