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2017-02-17core/opal: check ibm,opal existsOliver O'Halloran1-5/+1
The ibm,opal node is normally created by Skiboot either in the HDAT parser or after the input FDT has been unflattened. However, in order to supply the /ibm,opal/power-mgt/enabled-stop-states property FDT we to tolerate /ibm,opal/ existing in the input tree. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16core/pci: Avoid hreset after fresetGavin Shan1-1/+2
Commit 5ac71c9 ("pci: Avoid hot resets at boot time") missed to avoid hot reset after fundamental reset for PCIe common slots. This fixes it. Cc: stable # 5.3.x Reported-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16core/pci: Support SRIOV VFsGavin Shan5-2/+330
Currently, skiboot can't see SRIOV VFs. It introduces some troubles as I can see: The device initialization logic (phb->ops->device_init()) isn't applied to VFs, meaning we have to maintain same and duplicated mechanism in kernel for VFs only. It introduces difficulty to code maintaining and prone to lose sychronization. This was motivated by bug reported by Carol: The VF's Max Payload Size (MPS) isn't matched with PF's on Mellanox's adapter even kernel tried to make them same. It's caused by readonly PCIECAP_EXP_DEVCTL register on VFs. The skiboot would be best place to emulate this bits to eliminate the gap as I can see. This supports SRIOV VFs. When the PF's SRIOV capability is populated, the number of maximal VFs (struct pci_device) are instanciated, but but not usable yet. In the mean while, PCI config register filter is registered against PCIECAP_SRIOV_CTRL_VFE to capture the event of enabling or disabling VFs. The VFs are initialized, put into the PF's children list (pd->children), populate its PCI capabilities, and register PCI config register filter against PCICAP_EXP_DEVCTL. The filter's handler caches what is written to MPS field and returns the cached value on read, to eliminate the gap mentioned as above. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hw/phb3: Apply config register filter after HW changeGavin Shan1-3/+3
The PCI config register is applied before the HW register is changed. It won't work when this mechanism is used to capture the change to SRIOV capability in subsequent patch. This moves the logic around so that the filter is applied after HW register is changed. Currently, it's used to cache bridge's pref window base/length. The code change shouldn't affect that. So no functional changes introduced by this. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16core/pci: Allow associating parameter with capabilityGavin Shan2-9/+22
When we start to support SRIOV capability in subsequent patches, a data struct will be instantiated and associated with the SRIOV capability. This extends the current implementation for that. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16core/pci: Initialize AER capability in PCI coreGavin Shan4-48/+22
Currently, AER capability is initialized in phb_ops->device_init() which is called after the device is instantiated by PCI core, or reinitializing the device after reset in EEH recovery path. It means we are maintaining similar sets of codes for P7IOC, PHB3 and PHB4. This moves the logic initializing AER capability from P7IOC, PHB3 and PHB4 to PCI core, thus the duplicated codes can be dropped. No functional changes introduced by this. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16core/pci: Introduce separate function to initialize PCIe capabilityGavin Shan2-53/+67
The logic initializing device's PCIe capability is resident in the function pci_scan_one() from day one. It's because information (e.g. vendor/device IDs) aren't stored into PCI device instance in old days. Now, the PCI device instance contains all information required to initialize its PCIe capability and others. This moves the logic initializing PCIe capability from pci_scan_one() to separate functions, pci_init_capabilities() and pci_init_pcie_cap(). pci_scan_one() is simplified to make code maintaining a bit easier. Also, it will allow us to intorduce separate functions to initialize other capabilities as we're doing for PCIe capability. This also exports pci_init_capabilities() so that it can be reused by SRIOV VFs in future. No logical changes introduced by this. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hdata_to_dt: Specify PVR on command lineStewart Smith4-97/+110
Current tests cases are just P8E chips, so specify that. An exercise for the reader is to grab POWER7 and POWER9 dumps. [Minor fixups for the blob patch - Oliver] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hdata/test: Remove old testcase outputOliver O'Halloran2-2885/+0
Gets rid of the non-dts test cases. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hdata_to_dt: Only output dtbStewart Smith12-48/+35
convert test cases to diff DTS rather than DTB. This means we also have to build dtc on CentOS 7 to be able to run the test suite. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> [oohall@gmail.com moved the test cases into seperate patches] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hdata/test: Add DTS output for the test casesOliver O'Halloran2-0/+3189
Add the DTS version of the output files. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-16hdata/test: strip blobs from the DT outputOliver O'Halloran3-10294/+64
Adds a post-processing step the hdata_to_dt test program that replaces large "blobs" in the device tree with a <0xcafebeef, length, checksum> u32 tuple. The actual contents of these blobs are mostly irrelevant. We only care that they are a) present in the device tree and b) aren't silently corrupted by the HDAT parser. Outputting a checksum instead of the full blob is sufficent for testing the parser. This reduces the size of the test case output considerably so hopefully we stop crashing everyone's mail client whenever the tests are changed. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-15remove 'update mode for partitions' from TODO listWerner Fischer1-2/+0
Remove 'Support pnor "update" mode which only update selected partitions' from TODO list as pflash supports --partition=part_name already Signed-off-by: Werner Fischer <wfischer@thomas-krenn.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-07xive/psi/lpc: Handle proper clearing of LPC SerIRQ latch on DD1Benjamin Herrenschmidt5-6/+79
On DD1, the LPC SerIRQ are latched to 1 in HW but never back to 0, we need an explicit clear after running the handler. (Not before as they are level interrupts, they will be latched again if they are still pending). For now we do that in lpc_dispatch_ser_irqs() but that only works for interrupts routed to OPAL. In order to support routing LPC interrutps to Linux, we need a custom EOI handler that does the clearing of the latch before we do the EOI in the ESB. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-07lpc: Mark the power9 LPC bus as compatible with power8Benjamin Herrenschmidt2-5/+10
We support all the OPAL calls, and it avoids bugs in existing Linux kernels that would otherwise crash when attempting to access devices using a direct mapping. When Linux is fixed it will recognize that direct mapping is supported and avoid the OPAL calls. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-07uart: Fix Linux pass-through policyBenjamin Herrenschmidt4-6/+43
This was broken on Rhesus. Also add an nvram way of overriding the policy Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-07slw: Fix parsing of supported STOP statesShilpasri G Bhat1-2/+4
Bits[0-15] are used to indicate the supported STOP states in "ibm,enabled-stop-levels" DT property and STOP0 is starting from Bit0. This patch fixes the parsing to read the appropriate bits. Fixes: c3ea33f173ec ("hw/slw: only enable supported STOP states") Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06Dead code and data eliminationNicholas Piggin3-4/+13
Add an experimental option to do basic dead code and data elimintation with -ffunction-sections/-fdata-sections/--gc-sections. This saves about 80kB of text/data. Also remove the use of of -ffunction-sections by default. This predates git history, but I don't think there is a good reason to use it without --gc-sections. The GCC manual says: Only use these options when there are significant benefits from doing so. When you specify these options, the assembler and linker create larger object and executable files and are also slower. You cannot use gprof on all systems if you specify this option, and you may have problems with debugging if you specify both this option and -g. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06Initial support for the ELFv2 ABINicholas Piggin6-12/+101
Provide an experimental option to compile using ELFv2 ABI even on big endian builds. ELFv2 + BE is not officially supported by the toolchain, but it works quite well. It may be useful as a small step toward a little-endian build. This saves about 200kB of text/data. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06hdata: Add FDT output to hdata_to_dtOliver O'Halloran2-4/+94
Adds a new -d <filename> command line option to the hdata_to_dt utility to output a FDT blob. This lets us output the output DT in standard form that can be handled by the usual tools such as dtc. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06hdat: Rework parsing of system VPD for Open PowerBenjamin Herrenschmidt2-50/+64
Handle the OSYS record on OPP machines in stead of VSYS Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06hdat: Don't display "IPLPARAMS: No serial ports" on OPPBenjamin Herrenschmidt1-4/+2
The IPLPARAMs lacking serial ports isn't an error. Since it never happened on FSP machine and it's not used on BMC ones there is no need to print a message at all Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-06add CONTRIBUTING.mdStewart Smith1-0/+81
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03doc: Trivial fixesAnanth N Mavinakayanahalli1-3/+3
Fix some issues in the documentation. Signed-off-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03platform: add missing \n on platform error reboot messageAndrew Donnellan1-1/+1
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03slw: fix typo in slw dump commentJeremy Kerr1-1/+1
We have an typo in a @fwts-advice field, which means it's carried through to the generated fwts olog data. This change fixes the typo so that the advice output from fwts is correct. CC: Deb McLemore <debmc@linux.vnet.ibm.com> Reported-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03core/interrupts: free interrupt names after adding to DTStewart Smith1-0/+1
Fixes: 539487bae4b77 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03hdata/fsp: fixup lpc device node name creationStewart Smith1-1/+1
snprintf() with size of a pointer rather than the buffer to which we were printing into Found by static analysis. Fixes: 690f9da985b5f40d4f87ff161d43fd6989f6495c Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-03mambo: Don't probe ECID for DD1.0X on MamboStewart Smith1-1/+3
SCOM doesn't exist, we end up in a sad place (machine check) Fixes: c9cadb4fe60d4d41fc45a35a1d2ae27e0632c679 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Cleanup TM area on CPU callingBenjamin Herrenschmidt1-0/+8
In case HostBoot leaves some gunk behind Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xscom: Grab P9 DD1.0 revision levelBenjamin Herrenschmidt2-0/+29
To differentiate between 1.00, 1.01, 1.02 etc... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Fix failure to lower CPPR in opal_xive_get_xirr()Benjamin Herrenschmidt1-1/+7
There is a theorical possibility that if we don't get any pending interrupt in the queue in opal_xive_get_xirr() due to a spurious notification we leave the CPPR elevated. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Don't assume opal_xive_eoi() is called with the right queue prioBenjamin Herrenschmidt1-6/+3
Just use the one we know is valid rather than what's passed as an argument. Linux might call us with 0. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Fix opal_xive_check_pending()Benjamin Herrenschmidt1-2/+2
We were calculating the mask all wrong... we got lucky in the normal case though. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Force assign BARsBenjamin Herrenschmidt1-0/+4
For the same reason as PHBs ... we need to move that to a common module controlling the address map. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Fix configuration of the EX special BARBenjamin Herrenschmidt1-19/+28
This BAR is used to force a core to send "local" commands when hitting the TM area which has the same address on all chips. There is one copy of this per core *pair*. The existing code only sets it up on core 0 of a pair. However some systems have core 1 and not core 0 ... oooops. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Display the block ID when initializing an instanceBenjamin Herrenschmidt1-1/+1
This helps debugging multi-chip problems Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Spread the notification ports a bitBenjamin Herrenschmidt1-6/+8
There are 4 snoopers, 0 and 3 are pretty busy, so let's use a mix of 1 and 2 for the PHB and PSI notification ports. We do that by using different cache line offsets. We use 1 for PHB0 which tends to be the highest performance one and 2 for everybody else Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Set the FORCE_TM_LOCAL bit in CQ_PBI_CTLBenjamin Herrenschmidt2-1/+6
This bits saves the day if the special EX BARs happens to be misconfigured. There is no drawback to having it always set so let's do so. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Comments about in-memory overflow queuesBenjamin Herrenschmidt1-0/+4
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Cache scrub needs a syncBenjamin Herrenschmidt1-0/+1
After a scrub, use a sync to order any load to the newly updated memory. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Fix definition of VC_SCRUB_OFFSETBenjamin Herrenschmidt1-1/+1
Off by one on one bit Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02xive: Fix PIR2VP_BLK for 2-chip systemsBenjamin Herrenschmidt1-1/+10
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02libc/stdio/vsnprintf.c: add explicit fallthroughStewart Smith1-0/+1
silences recent GCC warning Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02habanero/slottable: Remove Network Mezz(2, 0) from PHB1.ppaidipe@linux.vnet.ibm.com1-5/+0
With addition of latest callback of check_all_slot_table found below error message in habanero platform. [ 17.069198739,3] PCI: built-in device not found: Network Mezz (loc: 10) https://github.com/open-power/skiboot/issues/54 So PHB1 already having one Network Mezz(1,0) which is the only one there in the habanero platform design layout. check_all_slot_table found the additional Network Mezz(2,0) in slot table is in-correct. Fix this by removing it. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-02hdata: Fix ibm,pa-features for all CPU typesBenjamin Herrenschmidt2-5/+60
Hopefully the values are all right ;-) A future TODO is to use some nice macro to make it clearer who is what. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: fake PVR_VERS_MAJ, use size_t] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-01-16Add skiboot 5.4.3 release notesStewart Smith1-0/+18
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> (cherry picked from 5.4.x commit 5930a57455fc405cbed70d6bdd0c911175c84e6d) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-01-16skiboot 5.1.19 release notesStewart Smith1-0/+49
(cherry picked from 5.1.x commit fc479923ff2028c4efaa8d3e1a8a45c7c9f74e60) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-01-16Fixup duplicate p9 entries in spira/xscomStewart Smith1-4/+0
Fixes: 0d81bda68f2b7adcecf268522ab9149b91115739 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-01-16hdat: Fix XSCOM nodes for P9Benjamin Herrenschmidt1-1/+19
The address mapping for multiple chips is different Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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