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-rw-r--r--include/npu2-regs.h5
-rw-r--r--include/npu2.h1
-rw-r--r--include/phys-map.h1
3 files changed, 7 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index ae55661..2d3fc3e 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -31,6 +31,11 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
#define MCD_BANK_CN_VALID PPC_BIT(0)
#define MCD_BANK_CN_SIZE PPC_BITMASK(13,29)
#define MCD_BANK_CN_ADDR PPC_BITMASK(33,63)
+#define PB_CENT_HP_MODE_CURR 0x5011c0c
+#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2)
+#define PB_CENT_MODE 0x5011c0a
+#define PB_CFG_CHIP_ADDR_EXTENSION_MASK_CENT PPC_BITMASK(42,48)
+
#define NPU2_REG_OFFSET(stack, block, offset) \
(((stack) << 20) | ((block) << 16) | (offset))
diff --git a/include/npu2.h b/include/npu2.h
index d30a91f..9563869 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -128,6 +128,7 @@ struct npu2 {
uint32_t base_lsi;
uint32_t total_devices;
struct npu2_dev *devices;
+ enum phys_map_type gpu_map_type;
/* IODA cache */
uint64_t lxive_cache[8];
diff --git a/include/phys-map.h b/include/phys-map.h
index c9b2389..73adda0 100644
--- a/include/phys-map.h
+++ b/include/phys-map.h
@@ -27,6 +27,7 @@ enum phys_map_type {
NULL_MAP,
SYSTEM_MEM,
GPU_MEM_4T_DOWN,
+ GPU_MEM_4T_UP,
PHB4_64BIT_MMIO,
PHB4_32BIT_MMIO,
PHB4_XIVE_ESB,