diff options
| -rw-r--r-- | doc/device-tree/pci.rst | 1 | ||||
| -rw-r--r-- | hw/phb4.c | 2 | ||||
| -rw-r--r-- | include/phb4.h | 1 |
3 files changed, 4 insertions, 0 deletions
diff --git a/doc/device-tree/pci.rst b/doc/device-tree/pci.rst index 26707c5..dbc0981 100644 --- a/doc/device-tree/pci.rst +++ b/doc/device-tree/pci.rst @@ -37,6 +37,7 @@ The following is an example PCI host bridge and device from a POWER9 machine. phandle = <0x617>; ibm,phb-stack = <0xd8>; ibm,phb-index = <0x3>; + ibm,phb-pec-index = <0x2>; /* skiboot-v6.2 or later */ reg = <0x600c3 0xc0300000 0x0 0x1000 0x600c3 0x60000000 0x0 0x10000000>; ibm,mmio-windows = <0x60200 0x0 0x40 0x0 0x600c1 0x80000000 0x0 0x80000000>; clock-frequency = <0x200 0x0>; @@ -5315,6 +5315,7 @@ static void phb4_create(struct dt_node *np) /* Populate base stuff */ p->index = dt_prop_get_u32(np, "ibm,phb-index"); p->chip_id = chip_id; + p->pec = dt_prop_get_u32(np, "ibm,phb-pec-index"); chip = get_chip(p->chip_id); p->regs = (void *)dt_get_address(np, 0, NULL); p->int_mmio = (void *)dt_get_address(np, 1, NULL); @@ -5623,6 +5624,7 @@ static void phb4_probe_stack(struct dt_node *stk_node, uint32_t pec_index, nest_base, nest_stack, pci_base, pci_stack, etu_base); dt_add_property(np, "ibm,mmio-windows", mmio_win, 8 * mmio_win_sz); dt_add_property_cells(np, "ibm,phb-index", phb_num); + dt_add_property_cells(np, "ibm,phb-pec-index", pec_index); dt_add_property_cells(np, "ibm,phb-stack", stk_node->phandle); dt_add_property_cells(np, "ibm,phb-stack-index", stk_index); dt_add_property_cells(np, "ibm,chip-id", gcid); diff --git a/include/phb4.h b/include/phb4.h index 4ab2912..3186dca 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -169,6 +169,7 @@ struct phb4 { unsigned int index; /* 0..5 index inside p9 */ unsigned int flags; unsigned int chip_id; /* Chip ID (== GCID on p9) */ + unsigned int pec; bool broken; unsigned int rev; /* 00MMmmmm */ #define PHB4_REV_NIMBUS_DD10 0xa40001 |