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-rw-r--r--core/hostservices.c1
-rw-r--r--core/init.c1
-rw-r--r--core/opal.c1
-rw-r--r--core/sensor.c1
-rw-r--r--hw/ipmi/ipmi-sel.c1
-rw-r--r--hw/occ-sensor.c2
-rw-r--r--hw/occ.c2
-rw-r--r--hw/psi.c1
-rw-r--r--include/occ.h (renamed from include/occ-sensor.h)32
-rw-r--r--include/skiboot.h27
-rw-r--r--platforms/ibm-fsp/common.c1
11 files changed, 41 insertions, 29 deletions
diff --git a/core/hostservices.c b/core/hostservices.c
index c37bf2f..d3a9b3c 100644
--- a/core/hostservices.c
+++ b/core/hostservices.c
@@ -29,6 +29,7 @@
#include <console.h>
#include <mem-map.h>
#include <timebase.h>
+#include <occ.h>
#define HOSTBOOT_RUNTIME_INTERFACE_VERSION 1
diff --git a/core/init.c b/core/init.c
index 272a57a..b660af2 100644
--- a/core/init.c
+++ b/core/init.c
@@ -53,6 +53,7 @@
#include <dts.h>
#include <sbe-p9.h>
#include <debug_descriptor.h>
+#include <occ.h>
enum proc_gen proc_gen;
unsigned int pcie_max_link_speed;
diff --git a/core/opal.c b/core/opal.c
index e3a3bbd..7ffca9c 100644
--- a/core/opal.c
+++ b/core/opal.c
@@ -31,6 +31,7 @@
#include <timer.h>
#include <elf-abi.h>
#include <errorlog.h>
+#include <occ.h>
/* Pending events to signal via opal_poll_events */
uint64_t opal_pending_events;
diff --git a/core/sensor.c b/core/sensor.c
index c3fa319..bd329a1 100644
--- a/core/sensor.c
+++ b/core/sensor.c
@@ -21,6 +21,7 @@
#include <opal.h>
#include <dts.h>
#include <lock.h>
+#include <occ.h>
struct dt_node *sensor_node;
diff --git a/hw/ipmi/ipmi-sel.c b/hw/ipmi/ipmi-sel.c
index 54cc597..eb63147 100644
--- a/hw/ipmi/ipmi-sel.c
+++ b/hw/ipmi/ipmi-sel.c
@@ -26,6 +26,7 @@
#include <pel.h>
#include <opal-msg.h>
#include <debug_descriptor.h>
+#include <occ.h>
/* OEM SEL fields */
#define SEL_OEM_ID_0 0x55
diff --git a/hw/occ-sensor.c b/hw/occ-sensor.c
index 783f757..c062f64 100644
--- a/hw/occ-sensor.c
+++ b/hw/occ-sensor.c
@@ -20,7 +20,7 @@
#include <sensor.h>
#include <device.h>
#include <cpu.h>
-#include <occ-sensor.h>
+#include <occ.h>
enum sensor_attr {
SENSOR_SAMPLE,
diff --git a/hw/occ.c b/hw/occ.c
index 29eb4bd..fc95d39 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -31,7 +31,7 @@
#include <powercap.h>
#include <psr.h>
#include <sensor.h>
-#include <occ-sensor.h>
+#include <occ.h>
/* OCC Communication Area for PStates */
diff --git a/hw/psi.c b/hw/psi.c
index f5168ba..cbdbeaa 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -35,6 +35,7 @@
#include <xive.h>
#include <sbe-p9.h>
#include <phys-map.h>
+#include <occ.h>
static LIST_HEAD(psis);
static u64 psi_link_timer;
diff --git a/include/occ-sensor.h b/include/occ.h
index 67ffae8..c9faef9 100644
--- a/include/occ-sensor.h
+++ b/include/occ.h
@@ -14,6 +14,38 @@
* limitations under the License.
*/
+/* OCC Functions */
+
+extern void occ_pstates_init(void);
+extern void occ_fsp_init(void);
+
+/* OCC interrupt for P8 */
+extern void occ_p8_interrupt(uint32_t chip_id);
+extern void occ_send_dummy_interrupt(void);
+
+/* OCC interrupt for P9 */
+extern void occ_p9_interrupt(uint32_t chip_id);
+
+/* OCC load support */
+extern void occ_poke_load_queue(void);
+
+/* OCC/Host PNOR ownership */
+enum pnor_owner {
+ PNOR_OWNER_HOST,
+ PNOR_OWNER_EXTERNAL,
+};
+extern void occ_pnor_set_owner(enum pnor_owner owner);
+
+
+/* OCC Inband Sensors */
+extern bool occ_sensors_init(void);
+extern int occ_sensor_read(u32 handle, u64 *data);
+extern int occ_sensor_group_clear(u32 group_hndl, int token);
+extern void occ_add_sensor_groups(struct dt_node *sg, u32 *phandles,
+ u32 *ptype, int nr_phandles, int chipid);
+
+extern int occ_sensor_group_enable(u32 group_hndl, int token, bool enable);
+
/*
* OCC Sensor Data
*
diff --git a/include/skiboot.h b/include/skiboot.h
index 989565c..bba76c1 100644
--- a/include/skiboot.h
+++ b/include/skiboot.h
@@ -206,10 +206,8 @@ extern void uart_init(void);
extern void mbox_init(void);
extern void early_uart_init(void);
extern void homer_init(void);
-extern void occ_pstates_init(void);
extern void slw_init(void);
extern void add_cpu_idle_state_properties(void);
-extern void occ_fsp_init(void);
extern void lpc_rtc_init(void);
/* flash support */
@@ -242,23 +240,6 @@ enum {
extern void uart_set_console_policy(int policy);
extern bool uart_enabled(void);
-/* OCC interrupt for P8 */
-extern void occ_p8_interrupt(uint32_t chip_id);
-extern void occ_send_dummy_interrupt(void);
-
-/* OCC interrupt for P9 */
-extern void occ_p9_interrupt(uint32_t chip_id);
-
-/* OCC load support */
-extern void occ_poke_load_queue(void);
-
-/* OCC/Host PNOR ownership */
-enum pnor_owner {
- PNOR_OWNER_HOST,
- PNOR_OWNER_EXTERNAL,
-};
-extern void occ_pnor_set_owner(enum pnor_owner owner);
-
/* PRD */
extern void prd_psi_interrupt(uint32_t proc);
extern void prd_tmgt_interrupt(uint32_t proc);
@@ -310,12 +291,4 @@ extern int fake_nvram_info(uint32_t *total_size);
extern int fake_nvram_start_read(void *dst, uint32_t src, uint32_t len);
extern int fake_nvram_write(uint32_t offset, void *src, uint32_t size);
-/* OCC Inband Sensors */
-extern bool occ_sensors_init(void);
-extern int occ_sensor_read(u32 handle, u64 *data);
-extern int occ_sensor_group_clear(u32 group_hndl, int token);
-extern void occ_add_sensor_groups(struct dt_node *sg, u32 *phandles,
- u32 *ptype, int nr_phandles, int chipid);
-
-extern int occ_sensor_group_enable(u32 group_hndl, int token, bool enable);
#endif /* __SKIBOOT_H */
diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c
index d7433e3..a7f2bee 100644
--- a/platforms/ibm-fsp/common.c
+++ b/platforms/ibm-fsp/common.c
@@ -23,6 +23,7 @@
#include <hostservices.h>
#include <ipmi.h>
#include <debug_descriptor.h>
+#include <occ.h>
#include "ibm-fsp.h"