diff options
| -rw-r--r-- | asm/head.S | 5 | ||||
| -rw-r--r-- | core/exceptions.c | 164 | ||||
| -rw-r--r-- | include/cpu.h | 1 | ||||
| -rw-r--r-- | include/opal.h | 104 | ||||
| -rw-r--r-- | include/stack.h | 1 |
5 files changed, 0 insertions, 275 deletions
@@ -35,11 +35,6 @@ b . ; -/** - * patch_exception() makes assumptions about this macro, in order to extract - * the correct stack during MC. If you update this, also check the offset and - * the patch code in that function. - */ #define GET_STACK(stack_reg,pir_reg) \ sldi stack_reg,pir_reg,STACK_SHIFT; \ addis stack_reg,stack_reg,CPU_STACKS_OFFSET@ha; \ diff --git a/core/exceptions.c b/core/exceptions.c index a2ef448..4a4da15 100644 --- a/core/exceptions.c +++ b/core/exceptions.c @@ -20,8 +20,6 @@ #include <processor.h> #include <cpu.h> -static uint64_t client_mc_address; - extern uint8_t exc_primary_start; extern uint8_t exc_primary_end; @@ -40,165 +38,6 @@ extern uint32_t exc_secondary_patch_rfid; struct lock hmi_lock = LOCK_UNLOCKED; -#define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42)) - -#define SRR1_MC_IFETCH(srr1) ((srr1) & PPC_BITMASK(43,45)) -#define SRR1_MC_IFETCH_UE (0x1 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_SLB_PARITY (0x2 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_SLB_MULTIHIT (0x3 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_SLB_BOTH (0x4 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_TLB_MULTIHIT (0x5 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_UE_TLB_RELOAD (0x6 << PPC_BITLSHIFT(45)) -#define SRR1_MC_IFETCH_UE_IFU_INTERNAL (0x7 << PPC_BITLSHIFT(45)) - -#define DSISR_MC_UE (PPC_BIT(48)) -#define DSISR_MC_UE_TABLEWALK (PPC_BIT(49)) -#define DSISR_MC_ERAT_MULTIHIT (PPC_BIT(52)) -#define DSISR_MC_TLB_MULTIHIT_MFTLB (PPC_BIT(53)) -#define DSISR_MC_TLB_MULTIHIT_MFSLB (PPC_BIT(55)) -#define DSISR_MC_TLB_MULTIHIT (PPC_BIT(53) | PPC_BIT(55)) -#define DSISR_MC_SLB_MULTIHIT (PPC_BIT(56)) -#define DSISR_MC_SLB_MULTIHIT_PARITY (PPC_BIT(57)) - -static void mce_set_ierror(struct opal_machine_check_event *mce, uint64_t srr1) -{ - switch (SRR1_MC_IFETCH(srr1)) { - case SRR1_MC_IFETCH_SLB_PARITY: - mce->error_type = OpalMCE_ERROR_TYPE_SLB; - mce->u.slb_error.slb_error_type = OpalMCE_SLB_ERROR_PARITY; - break; - - case SRR1_MC_IFETCH_SLB_MULTIHIT: - mce->error_type = OpalMCE_ERROR_TYPE_SLB; - mce->u.slb_error.slb_error_type = OpalMCE_SLB_ERROR_MULTIHIT; - break; - - case SRR1_MC_IFETCH_SLB_BOTH: - mce->error_type = OpalMCE_ERROR_TYPE_SLB; - mce->u.slb_error.slb_error_type = - OpalMCE_SLB_ERROR_INDETERMINATE; - break; - - case SRR1_MC_IFETCH_TLB_MULTIHIT: - mce->error_type = OpalMCE_ERROR_TYPE_TLB; - mce->u.tlb_error.tlb_error_type = OpalMCE_TLB_ERROR_MULTIHIT; - break; - - case SRR1_MC_IFETCH_UE: - case SRR1_MC_IFETCH_UE_IFU_INTERNAL: - mce->error_type = OpalMCE_ERROR_TYPE_UE; - mce->u.ue_error.ue_error_type = OpalMCE_UE_ERROR_IFETCH; - break; - - case SRR1_MC_IFETCH_UE_TLB_RELOAD: - mce->error_type = OpalMCE_ERROR_TYPE_UE; - mce->u.ue_error.ue_error_type = - OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH; - break; - } - -} - -static void mce_set_derror(struct opal_machine_check_event *mce, uint64_t dsisr) -{ - if (dsisr & DSISR_MC_UE) { - mce->error_type = OpalMCE_ERROR_TYPE_UE; - mce->u.ue_error.ue_error_type = OpalMCE_UE_ERROR_LOAD_STORE; - - } else if (dsisr & DSISR_MC_UE_TABLEWALK) { - mce->error_type = OpalMCE_ERROR_TYPE_UE; - mce->u.ue_error.ue_error_type = - OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE; - - } else if (dsisr & DSISR_MC_ERAT_MULTIHIT) { - mce->error_type = OpalMCE_ERROR_TYPE_ERAT; - mce->u.erat_error.erat_error_type = - OpalMCE_ERAT_ERROR_MULTIHIT; - - } else if (dsisr & DSISR_MC_TLB_MULTIHIT) { - mce->error_type = OpalMCE_ERROR_TYPE_TLB; - mce->u.tlb_error.tlb_error_type = - OpalMCE_TLB_ERROR_MULTIHIT; - - } else if (dsisr & DSISR_MC_SLB_MULTIHIT) { - mce->error_type = OpalMCE_ERROR_TYPE_SLB; - mce->u.slb_error.slb_error_type = - OpalMCE_SLB_ERROR_MULTIHIT; - - } else if (dsisr & DSISR_MC_SLB_MULTIHIT_PARITY) { - mce->error_type = OpalMCE_ERROR_TYPE_SLB; - mce->u.slb_error.slb_error_type = - OpalMCE_SLB_ERROR_INDETERMINATE; - } -} - -/* Called from head.S, thus no prototype */ -void handle_machine_check(struct stack_frame *stack); - -void handle_machine_check(struct stack_frame *stack) -{ - struct opal_machine_check_event *mce; - uint64_t srr1, addr; - - mce = &this_cpu()->mc_event; - - /* This will occur if we get another MC between the time that - * we re-set MSR_ME, and the OS clears this flag. - * - * However, the alternative is keeping MSR_ME cleared, and letting - * the OS re-set it (after clearing the flag). However, we - * risk a checkstop, and an opal assert() is the better option. - */ - assert(!mce->in_use); - - mce->in_use = 1; - - /* Populate generic machine check info */ - mce->version = OpalMCE_V1; - mce->srr0 = stack->srr0; - mce->srr1 = stack->srr1; - mce->gpr3 = stack->gpr[3]; - - mce->initiator = OpalMCE_INITIATOR_CPU; - mce->disposition = OpalMCE_DISPOSITION_NOT_RECOVERED; - mce->severity = OpalMCE_SEV_ERROR_SYNC; - - srr1 = stack->srr1; - - /* Populate the mce error_type and type-specific error_type from either - * SRR1 or DSISR, depending whether this was a load/store or ifetch - * exception */ - if (SRR1_MC_LOADSTORE(srr1)) { - mce_set_derror(mce, srr1); - addr = stack->srr0; - } else { - mce_set_ierror(mce, mfspr(SPR_DSISR)); - addr = mfspr(SPR_DAR); - } - - if (mce->error_type == OpalMCE_ERROR_TYPE_TLB) { - mce->u.tlb_error.effective_address_provided = true; - mce->u.tlb_error.effective_address = addr; - - } else if (mce->error_type == OpalMCE_ERROR_TYPE_SLB) { - mce->u.slb_error.effective_address_provided = true; - mce->u.slb_error.effective_address = addr; - - } else if (mce->error_type == OpalMCE_ERROR_TYPE_ERAT) { - mce->u.erat_error.effective_address_provided = true; - mce->u.erat_error.effective_address = addr; - - } else if (mce->error_type == OpalMCE_ERROR_TYPE_UE) { - mce->u.ue_error.effective_address_provided = true; - mce->u.ue_error.effective_address = addr; - } - - /* Setup stack to rfi into the OS' handler, with ME re-enabled. */ - stack->gpr[3] = (uint64_t)mce; - stack->srr0 = client_mc_address; - stack->srr1 = mfmsr() | MSR_ME; -} - #define REG "%016llx" #define REGS_PER_LINE 4 #define LAST_VOLATILE 13 @@ -389,9 +228,6 @@ void exception_entry(struct stack_frame *stack); void exception_entry(struct stack_frame *stack) { switch(stack->type) { - case STACK_ENTRY_MCHECK: - handle_machine_check(stack); - break; case STACK_ENTRY_HMI: handle_hmi(stack); /* XXX TODO : Implement machine check */ diff --git a/include/cpu.h b/include/cpu.h index a871073..6112ab2 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -51,7 +51,6 @@ struct cpu_thread { struct cpu_thread *primary; enum cpu_thread_state state; struct dt_node *node; - struct opal_machine_check_event mc_event; struct trace_info *trace; uint64_t save_r1; void *icp_regs; diff --git a/include/opal.h b/include/opal.h index effcd17..6c9b13a 100644 --- a/include/opal.h +++ b/include/opal.h @@ -280,62 +280,6 @@ enum OpalPendingState { OPAL_EVENT_MSG_PENDING = 0x800, }; -/* Machine check related definitions */ -enum OpalMCE_Version { - OpalMCE_V1 = 1, -}; - -enum OpalMCE_Severity { - OpalMCE_SEV_NO_ERROR = 0, - OpalMCE_SEV_WARNING = 1, - OpalMCE_SEV_ERROR_SYNC = 2, - OpalMCE_SEV_FATAL = 3, -}; - -enum OpalMCE_Disposition { - OpalMCE_DISPOSITION_RECOVERED = 0, - OpalMCE_DISPOSITION_NOT_RECOVERED = 1, -}; - -enum OpalMCE_Initiator { - OpalMCE_INITIATOR_UNKNOWN = 0, - OpalMCE_INITIATOR_CPU = 1, -}; - -enum OpalMCE_ErrorType { - OpalMCE_ERROR_TYPE_UNKNOWN = 0, - OpalMCE_ERROR_TYPE_UE = 1, - OpalMCE_ERROR_TYPE_SLB = 2, - OpalMCE_ERROR_TYPE_ERAT = 3, - OpalMCE_ERROR_TYPE_TLB = 4, -}; - -enum OpalMCE_UeErrorType { - OpalMCE_UE_ERROR_INDETERMINATE = 0, - OpalMCE_UE_ERROR_IFETCH = 1, - OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2, - OpalMCE_UE_ERROR_LOAD_STORE = 3, - OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4, -}; - -enum OpalMCE_SlbErrorType { - OpalMCE_SLB_ERROR_INDETERMINATE = 0, - OpalMCE_SLB_ERROR_PARITY = 1, - OpalMCE_SLB_ERROR_MULTIHIT = 2, -}; - -enum OpalMCE_EratErrorType { - OpalMCE_ERAT_ERROR_INDETERMINATE = 0, - OpalMCE_ERAT_ERROR_PARITY = 1, - OpalMCE_ERAT_ERROR_MULTIHIT = 2, -}; - -enum OpalMCE_TlbErrorType { - OpalMCE_TLB_ERROR_INDETERMINATE = 0, - OpalMCE_TLB_ERROR_PARITY = 1, - OpalMCE_TLB_ERROR_MULTIHIT = 2, -}; - enum OpalThreadStatus { OPAL_THREAD_INACTIVE = 0x0, OPAL_THREAD_STARTED = 0x1, @@ -510,54 +454,6 @@ enum OpalSysCooling { OPAL_SYSCOOL_INSF = 0x0001, /* System insufficient cooling */ }; -struct opal_machine_check_event { - enum OpalMCE_Version version:8; /* 0x00 */ - uint8_t in_use; /* 0x01 */ - enum OpalMCE_Severity severity:8; /* 0x02 */ - enum OpalMCE_Initiator initiator:8; /* 0x03 */ - enum OpalMCE_ErrorType error_type:8; /* 0x04 */ - enum OpalMCE_Disposition disposition:8; /* 0x05 */ - uint8_t reserved_1[2]; /* 0x06 */ - uint64_t gpr3; /* 0x08 */ - uint64_t srr0; /* 0x10 */ - uint64_t srr1; /* 0x18 */ - union { /* 0x20 */ - struct { - enum OpalMCE_UeErrorType ue_error_type:8; - uint8_t effective_address_provided; - uint8_t physical_address_provided; - uint8_t reserved_1[5]; - uint64_t effective_address; - uint64_t physical_address; - uint8_t reserved_2[8]; - } ue_error; - - struct { - enum OpalMCE_SlbErrorType slb_error_type:8; - uint8_t effective_address_provided; - uint8_t reserved_1[6]; - uint64_t effective_address; - uint8_t reserved_2[16]; - } slb_error; - - struct { - enum OpalMCE_EratErrorType erat_error_type:8; - uint8_t effective_address_provided; - uint8_t reserved_1[6]; - uint64_t effective_address; - uint8_t reserved_2[16]; - } erat_error; - - struct { - enum OpalMCE_TlbErrorType tlb_error_type:8; - uint8_t effective_address_provided; - uint8_t reserved_1[6]; - uint64_t effective_address; - uint8_t reserved_2[16]; - } tlb_error; - } u; -}; - /* FSP memory errors handling */ enum OpalMemErr_Version { OpalMemErr_V1 = 1, diff --git a/include/stack.h b/include/stack.h index 4a08b75..2f27a7b 100644 --- a/include/stack.h +++ b/include/stack.h @@ -20,7 +20,6 @@ #include <mem-map.h> #define STACK_ENTRY_OPAL_API 0 /* OPAL call */ -#define STACK_ENTRY_MCHECK 0x0200 /* Machine check */ #define STACK_ENTRY_HMI 0x0e60 /* Hypervisor maintainance */ #define STACK_ENTRY_RESET 0x0100 /* System reset */ #define STACK_ENTRY_SOFTPATCH 0x1500 /* Soft patch (denorm emulation) */ |