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| author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-06-01 14:34:47 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-06-01 17:10:10 +1000 |
| commit | f232117367198c330ddf64a4c61bda0110ae9cec (patch) | |
| tree | 098556ac2e6b4488e7bfb0012d769be1f68d292b /test | |
| parent | 3bd6f3ba4a2070ab42647a0d07770e9828765031 (diff) | |
| download | skiboot-f232117367198c330ddf64a4c61bda0110ae9cec.zip skiboot-f232117367198c330ddf64a4c61bda0110ae9cec.tar.gz skiboot-f232117367198c330ddf64a4c61bda0110ae9cec.tar.bz2 | |
Optimized memset() implementation for POWER
This uses the dcbz instruction to clear cacheline at a time rather than
byte at a time. This means that even without high levels of optimization,
we *dramatically* improve boot performance with SKIBOOT_GCOV=1 and probably
ever so slightly speed things up for normal builds.
We currently just hard-code 128 as cacheline size as all CPUs that skiboot
currently boots on have 128 byte cachelines.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'test')
0 files changed, 0 insertions, 0 deletions