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authorRussell Currey <ruscur@russell.cc>2016-10-12 14:56:25 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-10-12 16:45:53 +1100
commit5ac71c9b9f7a6c7dc909bdcf121f8d1d11a10dc2 (patch)
tree9837295ab9513379212e79e2bb7a40c462527261 /platforms
parentd8b7ad297887f681bef06df684acb8ea97171bda (diff)
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pci: Avoid hot resets at boot time
In the PCI post-fundamental reset code, a hot reset is performed at the end. This is causing issues at boot time as a reset signal is being sent downstream before the links are up, which is causing issues on adapters behind switches. No errors result in skiboot, but the adapters are not usable in Linux as a result. Hot resets also occur in the FSP platform-specific code for conventional PCI slots, which could cause issues. This patch fixes some adapters not being configurable in Linux on some systems. The issue was not present in skiboot 5.2.x. Cc: stable # 5.3.x Signed-off-by: Russell Currey <ruscur@russell.cc> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'platforms')
-rw-r--r--platforms/ibm-fsp/firenze-pci.c47
1 files changed, 6 insertions, 41 deletions
diff --git a/platforms/ibm-fsp/firenze-pci.c b/platforms/ibm-fsp/firenze-pci.c
index 4cc0284..1d83409 100644
--- a/platforms/ibm-fsp/firenze-pci.c
+++ b/platforms/ibm-fsp/firenze-pci.c
@@ -40,6 +40,8 @@
* when you're going to change below values.
*/
#define FIRENZE_PCI_SLOT_NORMAL 0x00000000
+#define FIRENZE_PCI_SLOT_LINK 0x00000100
+#define FIRENZE_PCI_SLOT_LINK_START 0x00000101
#define FIRENZE_PCI_SLOT_HRESET 0x00000200
#define FIRENZE_PCI_SLOT_HRESET_START 0x00000201
#define FIRENZE_PCI_SLOT_FRESET 0x00000300
@@ -535,26 +537,8 @@ static int64_t firenze_pci_slot_freset(struct pci_slot *slot)
pval = (uint8_t *)(plat_slot->req->rw_buf);
*plat_slot->power_status = *pval;
- /* PHB3 slot supports post fundamental reset, we switch
- * to that. For normal PCI slot, we switch to hot reset
- * instead.
- */
- if (slot->ops.pfreset) {
- prlog(PR_DEBUG, "%016llx FRESET: Switch to PFRESET\n",
- slot->id);
- pci_slot_set_state(slot,
- FIRENZE_PCI_SLOT_PFRESET_START);
- return slot->ops.pfreset(slot);
- } else if (slot->ops.hreset) {
- prlog(PR_DEBUG, "%016llx FRESET: Switch to HRESET\n",
- slot->id);
- pci_slot_set_state(slot,
- FIRENZE_PCI_SLOT_HRESET_START);
- return slot->ops.hreset(slot);
- }
-
- pci_slot_set_state(slot, FIRENZE_PCI_SLOT_NORMAL);
- return OPAL_SUCCESS;
+ pci_slot_set_state(slot, FIRENZE_PCI_SLOT_LINK_START);
+ return slot->ops.poll_link(slot);
default:
prlog(PR_DEBUG, "%016llx FRESET: Unexpected state %08x\n",
slot->id, slot->state);
@@ -615,27 +599,8 @@ static int64_t firenze_pci_slot_perst(struct pci_slot *slot)
FIRENZE_PCI_SLOT_PERST_DELAY);
return pci_slot_set_sm_timeout(slot, msecs_to_tb(1500));
case FIRENZE_PCI_SLOT_PERST_DELAY:
- /*
- * Switch to post fundamental reset if the slot supports
- * that. Otherwise, we issue a proceeding hot reset on
- * the slot.
- */
- if (slot->ops.pfreset) {
- prlog(PR_DEBUG, "%016llx PERST: Switch to PFRESET\n",
- slot->id);
- pci_slot_set_state(slot,
- FIRENZE_PCI_SLOT_PFRESET_START);
- return slot->ops.pfreset(slot);
- } else if (slot->ops.hreset) {
- prlog(PR_DEBUG, "%016llx PERST: Switch to HRESET\n",
- slot->id);
- pci_slot_set_state(slot,
- FIRENZE_PCI_SLOT_HRESET_START);
- return slot->ops.hreset(slot);
- }
-
- pci_slot_set_state(slot, FIRENZE_PCI_SLOT_NORMAL);
- return OPAL_SUCCESS;
+ pci_slot_set_state(slot, FIRENZE_PCI_SLOT_LINK_START);
+ return slot->ops.poll_link(slot);
default:
prlog(PR_DEBUG, "%016llx PERST: Unexpected state %08x\n",
slot->id, slot->state);