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author | Alistair Popple <alistair@popple.id.au> | 2016-04-22 13:35:26 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-04-27 08:02:13 +1000 |
commit | 9c42093c269cd3ac7a9a7026845f830bbfe446f0 (patch) | |
tree | 5bb138afd6e4f8be86c523772f8fa7aa7acd26d5 /platforms | |
parent | c814ef51febb2c3a65086c09f8cee8c3c5e16a51 (diff) | |
download | skiboot-9c42093c269cd3ac7a9a7026845f830bbfe446f0.zip skiboot-9c42093c269cd3ac7a9a7026845f830bbfe446f0.tar.gz skiboot-9c42093c269cd3ac7a9a7026845f830bbfe446f0.tar.bz2 |
platforms/astbmc/garrison.c: Add slot location names
Add the slot location names for the PCI and NPU slots.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Claimed-to-be-Tested-By: Abhijit Saikia <Abhijit.Saikia@in.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'platforms')
-rw-r--r-- | platforms/astbmc/garrison.c | 206 |
1 files changed, 206 insertions, 0 deletions
diff --git a/platforms/astbmc/garrison.c b/platforms/astbmc/garrison.c index bf4bb69..2370baf 100644 --- a/platforms/astbmc/garrison.c +++ b/platforms/astbmc/garrison.c @@ -25,6 +25,209 @@ #include "astbmc.h" +static const struct slot_table_entry garrison_phb0_0_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "Slot3", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb0_1_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "Slot2", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb0_2_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU0", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb0_3_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU1", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_npu0_slots[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU1", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,1), + .name = "GPU1", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(1,0), + .name = "GPU0", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(1,1), + .name = "GPU0", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb1_0_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "Slot1", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_plx_slots[] = { + { + .etype = st_builtin_dev, + .location = ST_LOC_DEVFN(1,0), + .name = "Backplane USB", + }, + { + .etype = st_builtin_dev, + .location = ST_LOC_DEVFN(2,0), + .name = "Backplane SATA", + }, + { + .etype = st_builtin_dev, + .location = ST_LOC_DEVFN(3,0), + .name = "Backplane BMC", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_plx_up[] = { + { + .etype = st_builtin_dev, + .location = ST_LOC_DEVFN(0,0), + .children = garrison_plx_slots, + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb1_1_slot[] = { + { + .etype = st_builtin_dev, + .location = ST_LOC_DEVFN(0,0), + .name = "Backplane PLX", + .children = garrison_plx_up, + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb1_2_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU2", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb1_3_slot[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU3", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_npu1_slots[] = { + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,0), + .name = "GPU3", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(0,1), + .name = "GPU3", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(1,0), + .name = "GPU2", + }, + { + .etype = st_pluggable_slot, + .location = ST_LOC_DEVFN(1,1), + .name = "GPU2", + }, + { .etype = st_end }, +}; + +static const struct slot_table_entry garrison_phb_table[] = { + { + .etype = st_phb, + .location = ST_LOC_PHB(0,0), + .children = garrison_phb0_0_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(0,1), + .children = garrison_phb0_1_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(0,2), + .children = garrison_phb0_2_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(0,3), + .children = garrison_phb0_3_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(0,4), + .children = garrison_npu0_slots, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(1,0), + .children = garrison_phb1_0_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(1,1), + .children = garrison_phb1_1_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(1,2), + .children = garrison_phb1_2_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(1,3), + .children = garrison_phb1_3_slot, + }, + { + .etype = st_phb, + .location = ST_LOC_PHB(1,4), + .children = garrison_npu1_slots, + }, + { .etype = st_end }, +}; + #define NPU_BASE 0x8013c00 #define NPU_SIZE 0x2c #define NPU_INDIRECT0 0x8000000008010c3f @@ -108,6 +311,8 @@ static bool garrison_probe(void) /* Fixups until HB get the NPU bindings */ dt_create_npu(); + slot_table_init(garrison_phb_table); + return true; } @@ -115,6 +320,7 @@ DECLARE_PLATFORM(garrison) = { .name = "Garrison", .probe = garrison_probe, .init = astbmc_init, + .pci_get_slot_info = slot_table_get_slot_info, .cec_power_down = astbmc_ipmi_power_down, .cec_reboot = astbmc_ipmi_reboot, .elog_commit = ipmi_elog_commit, |