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| author | Oliver O'Halloran <oohall@gmail.com> | 2019-09-05 20:50:42 +1000 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2019-09-06 16:59:59 +1000 |
| commit | 9c9375fd4448d67e05b5b2a587273e5c285f9376 (patch) | |
| tree | 9e885dce14782dad8e2a8640b920dfbb48a3aa92 /platforms/astbmc/garrison.c | |
| parent | fa161cd89fbf6f543f302651a0fd447b8dfc8b06 (diff) | |
| download | skiboot-9c9375fd4448d67e05b5b2a587273e5c285f9376.zip skiboot-9c9375fd4448d67e05b5b2a587273e5c285f9376.tar.gz skiboot-9c9375fd4448d67e05b5b2a587273e5c285f9376.tar.bz2 | |
hw/psi: Remove explicit external IRQ policy
Rather than having an explicit policy use the presence of a platform
defined external interrupt handler to determine whether we should direct
the interrupt to OPAL or not. This lets us remove a pile of
comments about why the policy is necessary and the comments about why
we need to un-set it on P8+
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'platforms/astbmc/garrison.c')
| -rw-r--r-- | platforms/astbmc/garrison.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/platforms/astbmc/garrison.c b/platforms/astbmc/garrison.c index 1b0f865..caf6113 100644 --- a/platforms/astbmc/garrison.c +++ b/platforms/astbmc/garrison.c @@ -258,17 +258,6 @@ static bool garrison_probe(void) /* Lot of common early inits here */ astbmc_early_init(); - /* - * Override external interrupt policy -> send to Linux - * - * On Naples, we get LPC interrupts via the built-in LPC - * controller demuxer, not an external CPLD. The external - * interrupt is for other uses, such as the TPM chip, we - * currently route it to Linux, but we might change that - * later if we decide we need it. - */ - psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_LINUX); - /* Fixups until HB get the NPU bindings */ dt_create_npu(); |