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author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-01-19 13:42:58 +1100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-01-19 13:42:58 +1100 |
commit | 43eb8bbcbaa5b4c01305b51b061ddd98e75efcae (patch) | |
tree | b19b146dc9239ebd3fdd49339a6f4b31ef207ecf /libstb | |
parent | 695bb562a315d4402fe3e82e93ed72265cefa8db (diff) | |
download | skiboot-43eb8bbcbaa5b4c01305b51b061ddd98e75efcae.zip skiboot-43eb8bbcbaa5b4c01305b51b061ddd98e75efcae.tar.gz skiboot-43eb8bbcbaa5b4c01305b51b061ddd98e75efcae.tar.bz2 |
libstb/cvc: Register P8 secure ROM code correctly
Register the location of the secure ROM, not the address of the location.
Fixes: 594c7a6ae3ccc
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'libstb')
-rw-r--r-- | libstb/cvc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libstb/cvc.c b/libstb/cvc.c index e9df190..d46617b 100644 --- a/libstb/cvc.c +++ b/libstb/cvc.c @@ -214,8 +214,8 @@ static int cvc_secure_rom_init(void) { xscom_read(chip->id, reg_addr, ®_data); memcpy_from_ci(secure_rom_mem, (void*) reg_data, SECURE_ROM_MEMORY_SIZE); - cvc_register((uint64_t)&secure_rom_mem, - (uint64_t)&secure_rom_mem + SECURE_ROM_MEMORY_SIZE-1); + cvc_register((uint64_t)secure_rom_mem, + (uint64_t)secure_rom_mem + SECURE_ROM_MEMORY_SIZE-1); cvc_service_register(CVC_SHA512_SERVICE, SECURE_ROM_SHA512_OFFSET, 1); cvc_service_register(CVC_VERIFY_SERVICE, SECURE_ROM_VERIFY_OFFSET, 1); return 0; |