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authorAndrew Donnellan <ajd@linux.ibm.com>2020-01-28 18:19:56 +1100
committerOliver O'Halloran <oohall@gmail.com>2020-01-29 13:51:35 +1100
commitbc72973d1321546a43f03367b5e73d8ff83a83bd (patch)
tree3d30b8625c137e24acd7146c4aa1d6e9ee1c8352 /include
parent8b9be4913366b02dbdb43bb8ddc7028a6e9129af (diff)
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hw/npu2-opencapi: Support multiple LPC devices
Currently, we only have a single range for LPC memory per chip, and we only allow a single device to use that range. With upcoming Hostboot/SBE changes, we'll use the chip address extension mask to give us multiple ranges by using the masked bits of the group ID. Each device can now allocate a whole 4TB non-mirrored region. We still don't do >4TB ranges. If the extension mask is not set correctly, we'll fall back to only permitting one device and printing an error suggesting a firmware upgrade. Signed-off-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/npu2.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/include/npu2.h b/include/npu2.h
index 309a7c7..85816a6 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -150,6 +150,8 @@ struct npu2_dev {
uint64_t linux_pe;
unsigned long train_start;
unsigned long train_timeout;
+ uint64_t lpc_mem_base;
+ uint64_t lpc_mem_size;
};
struct npu2 {
@@ -184,11 +186,6 @@ struct npu2 {
struct lock i2c_lock;
uint8_t i2c_pin_mode;
uint8_t i2c_pin_wr_state;
- /*
- * Which device currently has an LPC allocation.
- * Temporary as long as we only support 1 LPC alloc per chip.
- */
- struct npu2_dev *lpc_mem_allocated;
};
static inline struct npu2 *phb_to_npu2_nvlink(struct phb *phb)