diff options
author | Cédric Le Goater <clg@kaod.org> | 2021-08-07 09:38:20 +0200 |
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committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-18 16:35:39 +0530 |
commit | 3edfdb57712876300eab7f570356aec11b4bddca (patch) | |
tree | ec9c1368031379897c07d5398f42665bf06f87e8 /include | |
parent | de7141b5e5598633385756cced6a3a499571ab24 (diff) | |
download | skiboot-3edfdb57712876300eab7f570356aec11b4bddca.zip skiboot-3edfdb57712876300eab7f570356aec11b4bddca.tar.gz skiboot-3edfdb57712876300eab7f570356aec11b4bddca.tar.bz2 |
xive/p10: Fix mismatch errors when DEBUG=1
HW has some reserved fields which break the comparison when checking
END cache updates.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/xive2-regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/xive2-regs.h b/include/xive2-regs.h index 1f7a3e7..367c1ea 100644 --- a/include/xive2-regs.h +++ b/include/xive2-regs.h @@ -479,6 +479,7 @@ struct xive_end { #define END_W0_ESCALATE_END PPC_BIT32(13) /* "N" bit */ #define END_W0_FIRMWARE1 PPC_BIT32(16) /* Owned by FW */ #define END_W0_FIRMWARE2 PPC_BIT32(17) /* Owned by FW */ +#define END_W0_RESERVED PPC_BITMASK32(24,31) beint32_t w1; #define END_W1_ES PPC_BITMASK32(0,3) #define END_W1_ESn PPC_BITMASK32(0,1) @@ -487,6 +488,7 @@ struct xive_end { #define END_W1_ESe PPC_BITMASK32(2,3) #define END_W1_ESe_P PPC_BIT32(2) #define END_W1_ESe_Q PPC_BIT32(3) +#define END_W1_RESERVED PPC_BITMASK32(6,7) #define END_W1_GEN_FLIPPED PPC_BIT32(8) #define END_W1_GENERATION PPC_BIT32(9) #define END_W1_PAGE_OFF PPC_BITMASK32(10,31) @@ -511,6 +513,7 @@ struct xive_end { beint32_t w7; #define END_W7_TOPO PPC_BITMASK32(0,3) /* Owned by HW */ #define END_W7_F0_PRIORITY PPC_BITMASK32(8,15) +#define END_W7_F0_RESERVED PPC_BITMASK32(16,31) #define END_W7_F1_LOG_SERVER_ID PPC_BITMASK32(4,31) }; #define xive_end_is_firmware1(end) \ |