diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-12-12 16:22:53 +1100 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-11 23:31:45 -0600 |
commit | 238ef01e330fb3d1b180e9d0c1431d3d93d7c5f7 (patch) | |
tree | 17e509d8f230154d00aafd4494476b73f0095d72 /include | |
parent | 3e7f04a7398a5dcb38ff11d0b11f630630a3bb74 (diff) | |
download | skiboot-238ef01e330fb3d1b180e9d0c1431d3d93d7c5f7.zip skiboot-238ef01e330fb3d1b180e9d0c1431d3d93d7c5f7.tar.gz skiboot-238ef01e330fb3d1b180e9d0c1431d3d93d7c5f7.tar.bz2 |
io: Add load_wait() helper
This uses the standard form twi/isync pair to ensure a load
is consumed by the core before continuing. This can be necessary
under some circumstances for example when having the following
sequence:
- Store reg A
- Load reg A (ensure above store pushed out)
- delay loop
- Store reg A
IE, a mandatory delay between 2 stores. In theory the first store
is only guaranteed to rach the device after the load from the same
location has completed. However the processor will start executing
the delay loop without waiting for the return value from the load.
This construct enforces that the delay loop isn't executed until
the load value has been returned.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/io.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/io.h b/include/io.h index 45a385e..c056c37 100644 --- a/include/io.h +++ b/include/io.h @@ -170,6 +170,14 @@ static inline void out_le64(volatile uint64_t *addr, uint64_t val) #define in_le8 in_8 #define out_le8 out_8 +/* Ensure completion of a load (ie, value returned to CPU) + * before continuing execution + */ +static inline void load_wait(uint64_t data) +{ + asm volatile("twi 0,%0,0;isync" : : "r" (data) : "memory"); +} + #endif /* __ASSEMBLY__ */ #endif /* __IO_H */ |