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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-04-16 11:49:54 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-04-18 05:30:04 +1000 |
commit | 671db4d02680ed47ada64bd07efbe35468117698 (patch) | |
tree | 5528fe54a5ea37bffea2b5d7ef2514585f281dc1 /include | |
parent | 9d0a41554b841249aa6265e84be99696cc642e4d (diff) | |
download | skiboot-671db4d02680ed47ada64bd07efbe35468117698.zip skiboot-671db4d02680ed47ada64bd07efbe35468117698.tar.gz skiboot-671db4d02680ed47ada64bd07efbe35468117698.tar.bz2 |
pci: Fix presence detect on PHB3
The presence detect bit in the standard root complex config space is
not properly implemented on some IBM PHBs. Using it during probe is
incorrect.
We already have a workaround using the hotplug override "AB" detect
bits in the PHB3 code but it somewhat relies on the standard presence
detect bit returning false positives, which happened on Venice/Murano
but no longer happens in Naples.
Similarly, all the slot control stuff in the generic pci_enable_bridge()
isn't going to work properly on the PHB root complex and is unnecessary
as this code is only called after the upper layers have verified the
presence of a valid link on the PHB (the slot power control for the PHB
is handled separately).
This fixes it all by removing the AB detect flag, and unconditionally
using those bits in PHB3 presence detect along with making sure the
code in pci_enable_bridge() that manipulates the slot controls is
only executed on downstream ports.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/phb3.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/phb3.h b/include/phb3.h index 3db57ad..f785916 100644 --- a/include/phb3.h +++ b/include/phb3.h @@ -292,7 +292,6 @@ struct phb3 { bool skip_perst; /* Skip first perst */ bool has_link; - bool use_ab_detect; enum phb3_state state; uint64_t delay_tgt_tb; uint64_t retries; |