Add global physical memory map

This adds a global map for allocating physical memory address. This
centralises physical memory space allocations into one location rather
than spread through, PHB, XIVE, NX etc.

This adds a new call phys_map_get() which takes a chip, type and index
and returns a address and size for the region to be used.

An error in a call to this function crashes skiboot. This is done
since bogus calls here are going to be hit by developers not users and
they need to be fixed.

Currently only P9 is implemented but other chips should be easy to
add. On P9 BARs are generally set by skiboot. On P8 this was done by
hostboot so this is not needed there.

This just adds the infrastructure. User (PHB4, XIVE etc) will be
migrated in subsequent patches.

Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 63 insertions, 0 deletions

diff --git a/include/phys-map.h b/include/phys-map.h
new file mode 100644
index 0000000..a012432
--- /dev/null
+++ b/include/phys-map.h
@@ -0,0 +1,63 @@
+/* Copyright 2017 IBM Corp.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * 	http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ * implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __PHYS_MAP_H
+#define __PHYS_MAP_H
+
+#include <compiler.h>
+#include <stdint.h>
+#include <processor.h>
+#include <ccan/endian/endian.h>
+#include <chip.h>
+
+enum phys_map_type {
+	NULL_MAP,
+	SYSTEM_MEM,
+	GPU_MEM,
+	PHB4_64BIT_MMIO,
+	PHB4_32BIT_MMIO,
+	PHB4_XIVE_ESB,
+	PHB4_REG_SPC,
+	NPU_OCAPI_MMIO,
+	XIVE_VC,
+	XIVE_PC,
+	VAS_USER_WIN,
+	VAS_HYP_WIN,
+	OCAB_XIVE_ESB,
+	LPC_BUS,
+	FSP_MMIO,
+	NPU_REGS,
+	NPU_PHY,
+	NPU_NTL,
+	NPU_GENID,
+	PSI_LINK,
+	XIVE_IC,
+	XIVE_TM,
+	PSIHB_ESB,
+	NX_RNG,
+	CENTAUR_SCOM,
+	XSCOM,
+	RESV
+};
+
+extern void phys_map_get(struct proc_chip *chip, enum phys_map_type type,
+			 int index, uint64_t *addr, uint64_t *size);
+
+extern void phys_map_init(void);
+
+#endif /* __PHYS_MAP_H */
+
+//TODO self test overlaps and alignemnt and size.