aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorMichael Neuling <mikey@neuling.org>2016-05-02 15:26:21 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-05-10 16:04:51 +1000
commit591feeef8353c8a0ee73e42ff1538cf436c5fd1d (patch)
tree224bfb9fbed30b06eede81bd82d0506d91f24bb3 /include
parent3ff350343a67cd1897f37684613468a5f849ac1b (diff)
downloadskiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.zip
skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.tar.gz
skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.tar.bz2
Add base POWER9 support
Add PVR detection, chip id and other misc bits for POWER9. POWER9 changes the location of the HILE and attn enable bits in the HID0 register, so add these definitions also. Signed-off-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: Fix Numbus typo, hdata_to_dt build fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r--include/chip.h20
-rw-r--r--include/processor.h4
-rw-r--r--include/skiboot.h1
3 files changed, 25 insertions, 0 deletions
diff --git a/include/chip.h b/include/chip.h
index 72b85df..3409419 100644
--- a/include/chip.h
+++ b/include/chip.h
@@ -77,6 +77,24 @@
#define P8_PIR2THREADID(pir) ((pir) & 0x7)
+/*
+ * P9 GCID
+ * -------
+ *
+ * Global chip ID is a 7 bit number:
+ *
+ * NodeID ChipID
+ * | | |
+ * |___|___|___|___|___|___|___|
+ *
+ * Bit 56 is unused according to the manual by we add it to the coreid here.
+ */
+#define P9_PIR2GCID(pir) (((pir) >> 8) & 0x7f)
+
+#define P9_PIR2COREID(pir) (((pir) >> 2) & 0x3f)
+
+#define P9_PIR2THREADID(pir) ((pir) & 0x3)
+
struct dt_node;
struct centaur_chip;
struct mfsi;
@@ -89,6 +107,8 @@ enum proc_chip_type {
PROC_CHIP_P8_MURANO,
PROC_CHIP_P8_VENICE,
PROC_CHIP_P8_NAPLES,
+ PROC_CHIP_P9_NIMBUS,
+ PROC_CHIP_P9_CUMULUS,
};
/* Simulator quirks */
diff --git a/include/processor.h b/include/processor.h
index e05c4bb..1236c77 100644
--- a/include/processor.h
+++ b/include/processor.h
@@ -39,6 +39,7 @@
#define MSR_LE PPC_BIT(63) /* Little Endian */
/* PIR */
+#define SPR_PIR_P9_MASK 0x07ff /* Mask of implemented bits */
#define SPR_PIR_P8_MASK 0x1fff /* Mask of implemented bits */
#define SPR_PIR_P7_MASK 0x03ff /* Mask of implemented bits */
@@ -162,7 +163,9 @@
#define SPR_HID0_POWER8_4LPARMODE PPC_BIT(2)
#define SPR_HID0_POWER8_2LPARMODE PPC_BIT(6)
#define SPR_HID0_POWER8_HILE PPC_BIT(19)
+#define SPR_HID0_POWER9_HILE PPC_BIT(4)
#define SPR_HID0_POWER8_ENABLE_ATTN PPC_BIT(31)
+#define SPR_HID0_POWER9_ENABLE_ATTN PPC_BIT(3)
/* PVR bits */
#define SPR_PVR_TYPE 0xffff0000
@@ -179,6 +182,7 @@
#define PVR_TYPE_P8E 0x004b /* Murano */
#define PVR_TYPE_P8 0x004d /* Venice */
#define PVR_TYPE_P8NVL 0x004c /* Naples */
+#define PVR_TYPE_P9 0x004e
#ifdef __ASSEMBLY__
diff --git a/include/skiboot.h b/include/skiboot.h
index a85fafc..bece690 100644
--- a/include/skiboot.h
+++ b/include/skiboot.h
@@ -123,6 +123,7 @@ enum proc_gen {
proc_gen_unknown,
proc_gen_p7, /* P7 and P7+ */
proc_gen_p8,
+ proc_gen_p9,
};
extern enum proc_gen proc_gen;