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author | Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> | 2015-03-11 16:03:44 +0530 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-03-26 11:12:18 +1100 |
commit | 822403ea5dcc51a5c70c0ab061ef49adb17d82e4 (patch) | |
tree | 2e3d68cdd61433296667b54e0e0d36cc8d065377 /include | |
parent | 6c98c74a97dab762c996d884a53a8eaf4dc8e427 (diff) | |
download | skiboot-822403ea5dcc51a5c70c0ab061ef49adb17d82e4.zip skiboot-822403ea5dcc51a5c70c0ab061ef49adb17d82e4.tar.gz skiboot-822403ea5dcc51a5c70c0ab061ef49adb17d82e4.tar.bz2 |
opal: Handle TB residue and HDEC parity HMI errors on split core.
In case of split core, some of the Timer facility errors needs cleanup to be
done before we proceed with the error recovery.
Certain TB/HDEC errors leaves dirty data in timebase and HDEC registers,
which need to cleared before we initiate clear_tb_errors through TFMR[24].
The cleanup has to be done by any one thread from core or subcore.
In split core mode, it is required to clear the dirty data from TB/HDEC
register by all subcores (active partitions) before we clear tb errors
through TFMR[24]. The HMI recovery would fail even if one subcore do
not cleanup the respective TB/HDEC register. Dirty data can be cleaned by
writing zero's to TB/HDEC register.
For un-split core, any one thread can do the cleanup.
For split core, any one thread from each subcore can do the cleanup.
Errors that required pre-recovery cleanup:
- SPR_TFMR_TB_RESIDUE_ERR
- SPR_TFMR_HDEC_PARITY_ERROR
This patch implements pre-recovery steps to clean dirty data from TB/HDEC
register for above mentioned timer facility errors.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/chiptod.h | 1 | ||||
-rw-r--r-- | include/cpu.h | 13 | ||||
-rw-r--r-- | include/processor.h | 2 |
3 files changed, 16 insertions, 0 deletions
diff --git a/include/chiptod.h b/include/chiptod.h index e0490b6..43f1d3d 100644 --- a/include/chiptod.h +++ b/include/chiptod.h @@ -24,5 +24,6 @@ extern void chiptod_init(void); extern bool chiptod_wakeup_resync(void); extern int chiptod_recover_tb_errors(void); +extern void chiptod_reset_tb(void); #endif /* __CHIPTOD_H */ diff --git a/include/cpu.h b/include/cpu.h index bb516f2..168714a 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -72,6 +72,19 @@ struct cpu_thread { #endif struct lock job_lock; struct list_head job_queue; + /* + * Per-core mask tracking for threads in HMI handler and + * a cleanup done bit. + * [D][TTTTTTTT] + * + * The member 'core_hmi_state' is primary only. + * The 'core_hmi_state_ptr' member from all secondry cpus will point + * to 'core_hmi_state' member in primary cpu. + */ + uint32_t core_hmi_state; /* primary only */ + uint32_t *core_hmi_state_ptr; + /* Mask to indicate thread id in core. */ + uint8_t thread_mask; }; /* This global is set to 1 to allow secondaries to callin, diff --git a/include/processor.h b/include/processor.h index aaf7732..cdc5919 100644 --- a/include/processor.h +++ b/include/processor.h @@ -160,6 +160,8 @@ SPR_HMER_PROC_RECV_AGAIN) /* Bits in HID0 */ +#define SPR_HID0_POWER8_4LPARMODE PPC_BIT(2) +#define SPR_HID0_POWER8_2LPARMODE PPC_BIT(6) #define SPR_HID0_HILE PPC_BIT(19) #define SPR_HID0_ENABLE_ATTN PPC_BIT(31) |