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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2017-09-10 17:35:57 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-09-12 22:52:08 -0500
commit443b564523756712bcf79c4ff85abc6936c153dc (patch)
tree6dbe152e8813713eff939c2f16f298b2a4de2cec /include/xive.h
parent1cf6072fb8f7d4925fec6562f0c4fc265a146898 (diff)
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xive: Ensure pressure relief interrupts are disabled
We don't use them and we hijack the VP field with their configuration to store the EQ reference, so make sure the kernel or guest can't turn them back on by doing MMIO writes to ACK# Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/xive.h')
-rw-r--r--include/xive.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/xive.h b/include/xive.h
index 860373c..70f6499 100644
--- a/include/xive.h
+++ b/include/xive.h
@@ -75,6 +75,7 @@
#define PC_TCTXT_CFG 0x400
#define PC_TCTXT_CFG_BLKGRP_EN PPC_BIT(0)
#define PC_TCTXT_CFG_TARGET_EN PPC_BIT(1)
+#define PC_TCTXT_CFG_STORE_ACK PPC_BIT(3)
#define PC_TCTXT_CFG_HARD_CHIPID_BLK PPC_BIT(8)
#define PC_TCTXT_CHIPID_OVERRIDE PPC_BIT(9)
#define PC_TCTXT_CHIPID PPC_BITMASK(12,15)