opal: Handle TB residue and HDEC parity HMI errors on split core.

In case of split core, some of the Timer facility errors needs cleanup to be
done before we proceed with the error recovery.

Certain TB/HDEC errors leaves dirty data in timebase and HDEC registers,
which need to cleared before we initiate clear_tb_errors through TFMR[24].
The cleanup has to be done by any one thread from core or subcore.

In split core mode, it is required to clear the dirty data from TB/HDEC
register by all subcores (active partitions) before we clear tb errors
through TFMR[24]. The HMI recovery would fail even if one subcore do
not cleanup the respective TB/HDEC register. Dirty data can be cleaned by
writing zero's to TB/HDEC register.

For un-split core, any one thread can do the cleanup.
For split core, any one thread from each subcore can do the cleanup.

Errors that required pre-recovery cleanup:
- SPR_TFMR_TB_RESIDUE_ERR
- SPR_TFMR_HDEC_PARITY_ERROR

This patch implements pre-recovery steps to clean dirty data from TB/HDEC
register for above mentioned timer facility errors.

Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/include/processor.h b/include/processor.h
index aaf7732..cdc5919 100644
--- a/include/processor.h
+++ b/include/processor.h
@@ -160,6 +160,8 @@
 					 SPR_HMER_PROC_RECV_AGAIN)
 
 /* Bits in HID0 */
+#define SPR_HID0_POWER8_4LPARMODE	PPC_BIT(2)
+#define SPR_HID0_POWER8_2LPARMODE	PPC_BIT(6)
 #define SPR_HID0_HILE			PPC_BIT(19)
 #define SPR_HID0_ENABLE_ATTN		PPC_BIT(31)