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author | Michael Neuling <mikey@neuling.org> | 2017-01-12 23:53:17 -0600 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-01-16 12:11:01 +1100 |
commit | e9d2bfc6bd75f57b8143d782037a8043dc64a213 (patch) | |
tree | e3870af457ce58389cd001367396c0681337aa3f /include/processor.h | |
parent | e0f184b6eaf9e302cd1366042d37d7af968e38e9 (diff) | |
download | skiboot-e9d2bfc6bd75f57b8143d782037a8043dc64a213.zip skiboot-e9d2bfc6bd75f57b8143d782037a8043dc64a213.tar.gz skiboot-e9d2bfc6bd75f57b8143d782037a8043dc64a213.tar.bz2 |
Fix PIR mask for POWER9
Fix typo in PIR mask for POWER9. Fixes booting multi-chip.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/processor.h')
-rw-r--r-- | include/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/processor.h b/include/processor.h index 3942268..b98dff8 100644 --- a/include/processor.h +++ b/include/processor.h @@ -39,7 +39,7 @@ #define MSR_LE PPC_BIT(63) /* Little Endian */ /* PIR */ -#define SPR_PIR_P9_MASK 0x07ff /* Mask of implemented bits */ +#define SPR_PIR_P9_MASK 0x7fff /* Mask of implemented bits */ #define SPR_PIR_P8_MASK 0x1fff /* Mask of implemented bits */ #define SPR_PIR_P7_MASK 0x03ff /* Mask of implemented bits */ |