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author | Samuel Mendoza-Jonas <sam@mendozajonas.com> | 2019-05-09 13:08:40 +1000 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2019-05-09 15:06:39 +1000 |
commit | 1bc63b896405ccea4584d764a28d01858e81efc3 (patch) | |
tree | 8cae38af94a430224e8c2fbff5afc40f7cc5c63f /include/platform.h | |
parent | bc2b1de3beb2ee7904d936b10c8a57cd220d8ddc (diff) | |
download | skiboot-1bc63b896405ccea4584d764a28d01858e81efc3.zip skiboot-1bc63b896405ccea4584d764a28d01858e81efc3.tar.gz skiboot-1bc63b896405ccea4584d764a28d01858e81efc3.tar.bz2 |
platforms/astbmc: Check for SBE validation step
On some POWER8 astbmc systems an update to the SBE requires pausing at
runtime to ensure integrity of the SBE. If this is required the BMC will
set a chassis boot option IPMI flag using the OEM parameter 0x62. If
Skiboot sees this flag is set it waits until the SBE update is complete
and the flag is cleared.
Unfortunately the mystery operation that validates the SBE also leaves
it in a bad state and unable to be used for timer operations. To
workaround this the flag is checked as soon as possible (ie. when IPMI
and the console are set up), and once complete the system is rebooted.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'include/platform.h')
-rw-r--r-- | include/platform.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/platform.h b/include/platform.h index f63c24a..4f8627a 100644 --- a/include/platform.h +++ b/include/platform.h @@ -232,6 +232,11 @@ struct platform { * OPAL terminate */ void __attribute__((noreturn)) (*terminate)(const char *msg); + + /* + * SEEPROM update routine + */ + void (*seeprom_update)(void); }; extern struct platform __platforms_start; |