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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-06-27 10:27:41 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-30 14:43:29 +1000 |
| commit | ed8da3280e9ddeb33d76efaf4dff5b71eff642a7 (patch) | |
| tree | e28559d093379e5ef2b157edb3afb8f6624057ef /include/phb4-regs.h | |
| parent | 785c80b093c9ea608b6b91fee3634e5c8e323db3 (diff) | |
| download | skiboot-ed8da3280e9ddeb33d76efaf4dff5b71eff642a7.zip skiboot-ed8da3280e9ddeb33d76efaf4dff5b71eff642a7.tar.gz skiboot-ed8da3280e9ddeb33d76efaf4dff5b71eff642a7.tar.bz2 | |
phb4: Fix number of index bits in IODA tables
On PHB4 the number of index bits in the IODA table address register
was bumped to 10 bits to accomodate for 1024 MSIs and 1024 TVEs (DD2).
However our macro only defined the field to be 9 bits, thus causing
"interesting" behaviours on some systems.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/phb4-regs.h')
| -rw-r--r-- | include/phb4-regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index d22acf4..14e9351 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -97,7 +97,7 @@ #define PHB_IODA_AD_AUTOINC PPC_BIT(0) #define PHB_IODA_AD_TSEL PPC_BITMASK(11,15) #define PHB_IODA_AD_MIST_PWV PPC_BITMASK(28,31) -#define PHB_IODA_AD_TADR PPC_BITMASK(55,63) +#define PHB_IODA_AD_TADR PPC_BITMASK(54,63) #define PHB_IODA_DATA0 0x228 #define PHB_FFI_REQUEST 0x238 #define PHB_FFI_LOCK_CLEAR PPC_BIT(3) |