diff options
| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2017-06-13 14:21:20 +0200 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-19 14:49:29 +1000 |
| commit | 37ea3cfdc8523cb5fbbde6e364eaed3c1c67f8bb (patch) | |
| tree | 59a817c8ea18aec57db33c545fecc19ac25e26ef /include/phb4-regs.h | |
| parent | 43eb0ae6c2d4d05c4802b2de553f14234fe2cddf (diff) | |
| download | skiboot-37ea3cfdc8523cb5fbbde6e364eaed3c1c67f8bb.zip skiboot-37ea3cfdc8523cb5fbbde6e364eaed3c1c67f8bb.tar.gz skiboot-37ea3cfdc8523cb5fbbde6e364eaed3c1c67f8bb.tar.bz2 | |
capi: Enable capi mode for PHB4
Enable the Coherently attached processor interface. The PHB is used as
a CAPI interface.
CAPI Adapters can be connected to either PEC0 or PEC2. Single port
CAPI adapter can be connected to either PEC0 or PEC2, but Dual-Port
Adapter can be only connected to PEC2
CAPP0 attached to PHB0(PEC0 - single port)
CAPP1 attached to PHB3(PEC2 - single or dual port)
As we did for PHB3, a new specific file 'phb4-capp.h' is created to
contain the CAPP register definitions.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/phb4-regs.h')
| -rw-r--r-- | include/phb4-regs.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 1ccef3a..50fea29 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -71,8 +71,12 @@ #define PHB_PEST_BAR 0x1a8 #define PHB_PEST_BAR_ENABLE PPC_BIT(0) #define PHB_PEST_BASE_ADDRESS PPC_BITMASK(8,51) +#define PHB_PBL_ASN_CMPM 0x1C0 +#define PHB_PBL_ASN_ENABLE PPC_BIT(63) +#define PHB_CAPI_CMPM 0x1C8 +#define PHB_CAPI_CMPM_ENABLE PPC_BIT(63) #define PHB_M64_UPPER_BITS 0x1f0 -#define PHB_INTREP_TIMER 0x1f8 +#define PHB_NXLATE_PREFIX 0x1f8 #define PHB_DMARD_SYNC 0x200 #define PHB_DMARD_SYNC_START PPC_BIT(0) #define PHB_DMARD_SYNC_COMPLETE PPC_BIT(1) @@ -242,6 +246,7 @@ #define PHB_PBL_TIMEOUT_CTRL 0x1810 #define PHB_PBL_NPTAG_ENABLE 0x1820 #define PHB_PBL_NBW_CMP_MASK 0x1830 +#define PHB_PBL_NBW_MASK_ENABLE PPC_BIT(63) #define PHB_PBL_SYS_LINK_INIT 0x1838 #define PHB_PBL_BUF_STATUS 0x1840 #define PHB_PBL_ERR_STATUS 0x1900 |