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author | Philippe Bergheaud <felix@linux.vnet.ibm.com> | 2018-02-21 13:31:17 +0100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-03-01 20:36:53 -0600 |
commit | a8cfb0906643a7b074a5822bb312bf7481625905 (patch) | |
tree | 1bff51d3267f490cc20ab1c7b85198954c2f48fe /include/pci.h | |
parent | 56a85b41d23147e7dbe6d78d5a46d13910bc8495 (diff) | |
download | skiboot-a8cfb0906643a7b074a5822bb312bf7481625905.zip skiboot-a8cfb0906643a7b074a5822bb312bf7481625905.tar.gz skiboot-a8cfb0906643a7b074a5822bb312bf7481625905.tar.bz2 |
phb4: set PHB CMPM registers for tunneled operations
P9 supports PCI tunneled operations (atomics and as_notify) that require
setting the PHB ASN Compare/Mask register with a 16-bit indication.
This register is currently initialized by enable_capi_mode(). But, as
tunneled operations may also work in PCI mode, the ASN Compare/Mask
register should rather be initialized in phb4_init_ioda3().
This patch also adds "ibm,phb-indications" to the device tree, to tell
Linux the values of CAPI, ASN, and NBW indications, when supported.
Tunneled operations tested by IBM in CAPI mode, by Mellanox Technologies
in PCI mode.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/pci.h')
0 files changed, 0 insertions, 0 deletions