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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2016-10-20 14:17:17 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-10-24 12:14:58 +1100 |
| commit | 18d590eee08be63b5971a4e2a80d571c86b3a305 (patch) | |
| tree | 10d07db8d12e5fd4faa4146682851300391c6358 /include/pci-slot.h | |
| parent | da11e003fa1a77199a6fd67b2215d0a51e4f731d (diff) | |
| download | skiboot-18d590eee08be63b5971a4e2a80d571c86b3a305.zip skiboot-18d590eee08be63b5971a4e2a80d571c86b3a305.tar.gz skiboot-18d590eee08be63b5971a4e2a80d571c86b3a305.tar.bz2 | |
pci: make PCI slot state as incremental to base number
Various backends define their own PCI slot states for flexibility
with numbers [A]. PCI core also defines its PCI slot states [B].
For one specific PCI slot state, the major number of [A] and [B]
should be same so that the corresponding operation can be found.
It means [A] and [B] are relevant to some extent, but the code
where defines the PCI slots in backends doesn't reflect it.
This makes the major PCI slot state defined in backend same to
the corresponding one defined in PCI core. The minor PCI slot
states are made to be incremental to their base number (major
PCI slot state). No functional changes introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/pci-slot.h')
| -rw-r--r-- | include/pci-slot.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/pci-slot.h b/include/pci-slot.h index 694a448..f7634b8 100644 --- a/include/pci-slot.h +++ b/include/pci-slot.h @@ -125,25 +125,25 @@ struct pci_slot_ops { #define PCI_SLOT_STATE_MASK 0xFFFFFF00 #define PCI_SLOT_STATE_NORMAL 0x00000000 #define PCI_SLOT_STATE_LINK 0x00000100 -#define PCI_SLOT_STATE_LINK_START_POLL 0x00000101 -#define PCI_SLOT_STATE_LINK_DELAY_FINALIZED 0x00000102 -#define PCI_SLOT_STATE_LINK_POLLING 0x00000103 +#define PCI_SLOT_STATE_LINK_START_POLL (PCI_SLOT_STATE_LINK + 1) +#define PCI_SLOT_STATE_LINK_DELAY_FINALIZED (PCI_SLOT_STATE_LINK + 2) +#define PCI_SLOT_STATE_LINK_POLLING (PCI_SLOT_STATE_LINK + 3) #define PCI_SLOT_STATE_HRESET 0x00000200 -#define PCI_SLOT_STATE_HRESET_START 0x00000201 -#define PCI_SLOT_STATE_HRESET_HOLD 0x00000202 +#define PCI_SLOT_STATE_HRESET_START (PCI_SLOT_STATE_HRESET + 1) +#define PCI_SLOT_STATE_HRESET_HOLD (PCI_SLOT_STATE_HRESET + 2) #define PCI_SLOT_STATE_FRESET 0x00000300 -#define PCI_SLOT_STATE_FRESET_POWER_OFF 0x00000301 +#define PCI_SLOT_STATE_FRESET_POWER_OFF (PCI_SLOT_STATE_FRESET + 1) #define PCI_SLOT_STATE_PFRESET 0x00000400 -#define PCI_SLOT_STATE_PFRESET_START 0x00000401 +#define PCI_SLOT_STATE_PFRESET_START (PCI_SLOT_STATE_PFRESET + 1) #define PCI_SLOT_STATE_CRESET 0x00000500 -#define PCI_SLOT_STATE_CRESET_START 0x00000501 +#define PCI_SLOT_STATE_CRESET_START (PCI_SLOT_STATE_CRESET + 1) #define PCI_SLOT_STATE_GPOWER 0x00000600 -#define PCI_SLOT_STATE_GPOWER_START 0x00000601 +#define PCI_SLOT_STATE_GPOWER_START (PCI_SLOT_STATE_GPOWER + 1) #define PCI_SLOT_STATE_SPOWER 0x00000700 -#define PCI_SLOT_STATE_SPOWER_START 0x00000701 -#define PCI_SLOT_STATE_SPOWER_DONE 0x00000702 +#define PCI_SLOT_STATE_SPOWER_START (PCI_SLOT_STATE_SPOWER + 1) +#define PCI_SLOT_STATE_SPOWER_DONE (PCI_SLOT_STATE_SPOWER + 2) #define PCI_SLOT_STATE_GPRESENCE 0x00000800 -#define PCI_SLOT_STATE_GPRESENCE_START 0x00000801 +#define PCI_SLOT_STATE_GPRESENCE_START (PCI_SLOT_STATE_GPRESENCE + 1) struct pci_slot { |