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author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:56:59 +0200 |
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committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:01 +0530 |
commit | a3bbeac7e23795456df4f3f52d442bd1ba35eaa3 (patch) | |
tree | b8d649bbffb04b129cc972bbb2c097cfd3f21184 /include/npu2.h | |
parent | d4cd8a29e4c548f6383b47604a83c69b58d849e8 (diff) | |
download | skiboot-a3bbeac7e23795456df4f3f52d442bd1ba35eaa3.zip skiboot-a3bbeac7e23795456df4f3f52d442bd1ba35eaa3.tar.gz skiboot-a3bbeac7e23795456df4f3f52d442bd1ba35eaa3.tar.bz2 |
pau: hmi scom dump
This patch add a new function to dump PAU registers when a HMI has been
raised and an OpenCAPI link has been hit by an error.
For each register, the scom address and the register value are printed.
The hmi.c has been redesigned in order to support the new PHB/PCIEX
type (PAU OpenCapi). Now, the *npu* functions support NPU and PAU units of
P8, P9 and P10 chips.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include/npu2.h')
-rw-r--r-- | include/npu2.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/npu2.h b/include/npu2.h index 23b06b4..a12bf98 100644 --- a/include/npu2.h +++ b/include/npu2.h @@ -241,7 +241,7 @@ int64_t npu2_freeze_status(struct phb *phb __unused, uint8_t *freeze_state, uint16_t *pci_error_type __unused, uint16_t *severity __unused); -void npu2_dump_scoms(int chip_id); +void npu2_dump_scoms(struct npu2 *npu, int chip_id); int64_t npu2_init_context(struct phb *phb, uint64_t msr, uint64_t bdf); int64_t npu2_destroy_context(struct phb *phb, uint64_t bdf); |