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| author | Reza Arbab <arbab@linux.ibm.com> | 2018-08-01 15:01:17 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-08-06 03:00:59 -0500 |
| commit | f43465a0ac6da0e2f120c227e103497cb35cc8c4 (patch) | |
| tree | 5edde6d079f86d2557beb19aa609246fcb35c285 /include/npu2-regs.h | |
| parent | 06e9970099459ad01f3cb4456baf94093165a183 (diff) | |
| download | skiboot-f43465a0ac6da0e2f120c227e103497cb35cc8c4.zip skiboot-f43465a0ac6da0e2f120c227e103497cb35cc8c4.tar.gz skiboot-f43465a0ac6da0e2f120c227e103497cb35cc8c4.tar.bz2 | |
npu2: Don't open code NPU2_RELAXED_ORDERING_CFG2
Make the code that initializes these registers more descriptive by
using macros instead of open coded literals. No functional change.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Reviewed-By: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include/npu2-regs.h')
| -rw-r--r-- | include/npu2-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 4a17ac8..d9db988 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -155,6 +155,8 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, #define NPU2_RELAXED_ORDERING_CFG0 0x050 #define NPU2_RELAXED_ORDERING_CFG1 0x058 #define NPU2_RELAXED_ORDERING_CFG2 0x060 +#define NPU2_RELAXED_ORDERING_CMD_CL_RD_NC_F0 PPC_BIT(5) +#define NPU2_RELAXED_ORDERING_SOURCE4_RDENA PPC_BIT(29) #define NPU2_NTL0_BAR 0x068 #define NPU2_NTL1_BAR 0x070 #define NPU2_NTL_BAR_ENABLE PPC_BIT(0) |