aboutsummaryrefslogtreecommitdiff
path: root/include/npu2-regs.h
diff options
context:
space:
mode:
authorFrederic Barrat <fbarrat@linux.vnet.ibm.com>2018-03-01 18:57:16 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2018-03-01 20:17:54 -0600
commitcd8b82a8e83ed04206db0d820277b65cb2cf03bd (patch)
tree5b5c214dce4c3d1e66d7261b837e6fdaa7b806d6 /include/npu2-regs.h
parent6b1cdedcef1d3aa0b4eb772228b5c5aad24764dc (diff)
downloadskiboot-cd8b82a8e83ed04206db0d820277b65cb2cf03bd.zip
skiboot-cd8b82a8e83ed04206db0d820277b65cb2cf03bd.tar.gz
skiboot-cd8b82a8e83ed04206db0d820277b65cb2cf03bd.tar.bz2
npu2-opencapi: Add OpenCAPI OPAL API calls
Add three OPAL API calls that are required by the ocxl driver. - OPAL_NPU_SPA_SETUP The Shared Process Area (SPA) is a table containing one entry (a "Process Element") per memory context which can be accessed by the OpenCAPI device. - OPAL_NPU_SPA_CLEAR_CACHE The NPU keeps a cache of recently accessed memory contexts. When a Process Element is removed from the SPA, the cache for the link must be cleared. - OPAL_NPU_TL_SET The Transaction Layer specification defines several templates for messages to be exchanged on the link. During link setup, the host and device must negotiate what templates are supported on both sides and at what rates those messages can be sent. Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/npu2-regs.h')
-rw-r--r--include/npu2-regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index faaf5a1..db6e279 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -327,6 +327,7 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
#define NPU2_NTL_DL_CLK_CTRL(ndev) NPU2_DL_REG_OFFSET(ndev, 0x001C)
/* OpenCAPI - XSL registers */
+#define NPU2_XSL_PSL_LLCMD_A0 0x008
#define NPU2_XSL_PSL_SCNTL_A0 0x010
#define NPU2_XSL_PSL_SCNTL_A0_MULTI_AFU_DIAL PPC_BIT(0)
#define NPU2_XSL_DEF 0x040
@@ -334,6 +335,9 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
#define NPU2_XSL_GP_BLOOM_FILTER_ENABLE PPC_BIT(16)
#define NPU2_XSL_WRAP_CFG 0x0C0
#define NPU2_XSL_WRAP_CFG_XSLO_CLOCK_ENABLE PPC_BIT(0)
+#define NPU2_XSL_PSL_SPAP_A0 0
+#define NPU2_XSL_PSL_SPAP_A1 0x18
+#define NPU2_XSL_PSL_SPAP_EN PPC_BIT(63)
/* OpenCAPI - OTL registers */
#define NPU2_OTL_CONFIG0(stack, block) NPU2_REG_OFFSET(stack, block, 0x000)