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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2018-12-13 16:55:21 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-25 23:04:20 -0600 |
| commit | c0f17caddcd894f68340ba1c66151cc6b26aa5de (patch) | |
| tree | f5bfec446ab8f90ffac8176ca1efca5730dce81d /include/npu2-regs.h | |
| parent | ba1d95a1d460e0241d21561194c4cd06e518f329 (diff) | |
| download | skiboot-c0f17caddcd894f68340ba1c66151cc6b26aa5de.zip skiboot-c0f17caddcd894f68340ba1c66151cc6b26aa5de.tar.gz skiboot-c0f17caddcd894f68340ba1c66151cc6b26aa5de.tar.bz2 | |
npu2: Allow ATSD for LPAR other than 0
Each XTS MMIO ATSD# register is accompanied by another register -
XTS MMIO ATSD0 LPARID# - which controls LPID filtering for ATSD
transactions.
When a host system passes a GPU through to a guest, we need to enable
some ATSD for an LPAR. At the moment the host assigns one ATSD to
a NVLink bridge and this maps it to an LPAR when GPU is assigned to
the LPAR. The link number is used for an ATSD index.
ATSD6&7 stay mapped to the host (LPAR=0) all the time which seems to be
acceptable price for the simplicity.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include/npu2-regs.h')
| -rw-r--r-- | include/npu2-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 7171e9e..38087aa 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -547,6 +547,8 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, #define NPU2_XTS_MMIO_ATSD5_LPARID NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_XTS, 0x128) #define NPU2_XTS_MMIO_ATSD6_LPARID NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_XTS, 0x130) #define NPU2_XTS_MMIO_ATSD7_LPARID NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_XTS, 0x138) +#define NPU2_XTS_MMIO_ATSD_MSR_HV PPC_BIT(51) +#define NPU2_XTS_MMIO_ATSD_LPARID PPC_BITMASK(52, 63) #define NPU2_XTS_BDF_MAP NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_XTS, 0x4000) #define NPU2_XTS_BDF_MAP_VALID PPC_BIT(0) #define NPU2_XTS_BDF_MAP_UNFILT PPC_BIT(1) |