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| author | Reza Arbab <arbab@linux.ibm.com> | 2018-07-13 16:02:43 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-07-17 01:13:17 -0500 |
| commit | 041d69bb1a7084778d63a846d109c148c7a0009a (patch) | |
| tree | c78630372c8bcd01b8f46b36071d1f4b869821f4 /include/npu2-regs.h | |
| parent | c2493fd0ce30dd4204cf4cec2e9c4496201a0cf1 (diff) | |
| download | skiboot-041d69bb1a7084778d63a846d109c148c7a0009a.zip skiboot-041d69bb1a7084778d63a846d109c148c7a0009a.tar.gz skiboot-041d69bb1a7084778d63a846d109c148c7a0009a.tar.bz2 | |
npu2/hw-procedures: Enable parity and credit overflow checks
Enable these error checking features by setting the appropriate bits in
our one-off initialization of each "NTL Misc Config 2" register.
The exception is NDL RX parity checking, which should be disabled during
the link training procedures.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include/npu2-regs.h')
| -rw-r--r-- | include/npu2-regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index f67af97..7eb9d46 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -269,6 +269,10 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, /* NTL block registers */ #define NPU2_NTL_MISC_CFG2(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x000) #define NPU2_NTL_MISC_CFG2_BRICK_ENABLE PPC_BIT(0) +#define NPU2_NTL_MISC_CFG2_NDL_RX_PARITY_ENA PPC_BIT(16) +#define NPU2_NTL_MISC_CFG2_NDL_TX_PARITY_ENA PPC_BIT(17) +#define NPU2_NTL_MISC_CFG2_NDL_PRI_PARITY_ENA PPC_BIT(18) +#define NPU2_NTL_MISC_CFG2_RCV_CREDIT_OVERFLOW_ENA PPC_BIT(19) #define NPU2_NTL_MISC_CFG3(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x008) #define NPU2_NTL_ERR_HOLD1(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x010) #define NPU2_NTL_ERR_MASK1(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x018) |