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authorRussell Currey <ruscur@russell.cc>2016-01-18 16:59:40 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-01-21 11:59:47 +1100
commit04b200ce1eaaedaf425a49cc5369941fd837331d (patch)
tree5ee1d7e2721c6c6fd0d06f9dcbfc65929907cdc7 /include/npu.h
parent3e10683f4a0a6d6a71d4a93b7dcdb3ecf54e1c9e (diff)
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nvlink: Add fence mode emulation for NPUs
As NPUs are emulated PCI devices, they do not get physically fenced as real PCI devices do. As such, when the device is in a state that it should be fenced, we need to emulate this behaviour by returning all 1s in config space reads. This will be utilised by error injection in subsequent patches. Signed-off-by: Russell Currey <ruscur@russell.cc> Acked-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/npu.h')
-rw-r--r--include/npu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/npu.h b/include/npu.h
index 795b704..5d5135b 100644
--- a/include/npu.h
+++ b/include/npu.h
@@ -167,6 +167,7 @@ struct npu {
uint64_t tve_cache[NPU_NUM_OF_PES];
bool tx_zcal_complete[2];
+ bool fenced;
struct phb phb;
};