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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-11-12 15:44:33 +1100 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-11-12 16:41:25 +1100 |
commit | 0859f799583daa5fac57ab3f9a1175aae4de3252 (patch) | |
tree | ae5f70cd26f3ecd13e9b44003be1ae2375797260 /include/lpc.h | |
parent | eec6e53ff88c0cb82f3624642390793cc0f8e3ce (diff) | |
download | skiboot-0859f799583daa5fac57ab3f9a1175aae4de3252.zip skiboot-0859f799583daa5fac57ab3f9a1175aae4de3252.tar.gz skiboot-0859f799583daa5fac57ab3f9a1175aae4de3252.tar.bz2 |
i2c: Use new timer facility and improve interrupts handling
We only poll the masters for the chip that got the interrupt
and we improve the running of the timers as well.
We user the new TIMER_POLL facility to replace the use of the
OPAL poller, which simplifies the code further.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'include/lpc.h')
-rw-r--r-- | include/lpc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/lpc.h b/include/lpc.h index e4e24ea..632727f 100644 --- a/include/lpc.h +++ b/include/lpc.h @@ -28,7 +28,7 @@ extern void lpc_init(void); extern bool lpc_present(void); /* Handle the interrupt from LPC source */ -extern void lpc_interrupt(void); +extern void lpc_interrupt(uint32_t chip_id); /* Default bus accessors */ extern int64_t lpc_write(enum OpalLPCAddressType addr_type, uint32_t addr, |