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| author | Dan Streetman <ddstreet@ieee.org> | 2015-02-17 15:38:51 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-02-19 12:20:28 +1100 |
| commit | 7f91d66a0a3b0de9e6c729f031ee9adf9cea744b (patch) | |
| tree | a437651457118988abfd0def903dad75df94c149 /include/gx.h | |
| parent | 4a88a1452fe0e7f7d17d20aaf9b451969fb8c465 (diff) | |
| download | skiboot-7f91d66a0a3b0de9e6c729f031ee9adf9cea744b.zip skiboot-7f91d66a0a3b0de9e6c729f031ee9adf9cea744b.tar.gz skiboot-7f91d66a0a3b0de9e6c729f031ee9adf9cea744b.tar.bz2 | |
Change user-defined _MASK/_LSH to just mask
The last patch changed the SETFIELD() and GETFIELD() macros to automatically
calculate the shift of a given mask, so manually specifying the shift is no
longer needed. Additionally, any masks should have the _MASK suffix removed
since the GETFIELD() and SETFIELD() operations expected to be passed the
mask name without the _MASK suffix (and so either the mask name or the
get/setfield call needs to have its mask name changed).
Change all _MASK masks to remove the _MASK suffix, except for any places
that leaving _MASK makes sense (e.g. already an existing define without
_MASK suffix).
Remove all _LSH defines, as they are no longer needed.
Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/gx.h')
| -rw-r--r-- | include/gx.h | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/include/gx.h b/include/gx.h index f633892..4ba1661 100644 --- a/include/gx.h +++ b/include/gx.h @@ -24,30 +24,24 @@ /* P7 GX Mode 1 register (contains PSI BUID) */ #define GX_P7_MODE1_REG 0x0201180A -#define GX_P7_MODE1_PSI_BUID_MASK PPC_BITMASK(18,26) -#define GX_P7_MODE1_PSI_BUID_LSH PPC_BITLSHIFT(26) +#define GX_P7_MODE1_PSI_BUID PPC_BITMASK(18,26) #define GX_P7_MODE1_PSI_BUID_DISABLE PPC_BIT(27) /* P7+ GX Mode 4 register (PSI and NX BUIDs ) */ #define GX_P7P_MODE4_REG 0x02011811 #define GX_P7P_MODE4_ENABLE_NX_BUID PPC_BIT(0) -#define GX_P7P_MODE4_NX_BUID_BASE_MASK PPC_BITMASK(1,9) -#define GX_P7P_MODE4_NX_BUID_BASE_LSH PPC_BITLSHIFT(9) -#define GX_P7P_MODE4_NX_BUID_MASK_MASK PPC_BITMASK(10,18) -#define GX_P7P_MODE4_NX_BUID_MASK_LSH PPC_BITLSHIFT(18) -#define GX_P7P_MODE4_PSI_BUID_MASK PPC_BITMASK(19,27) -#define GX_P7P_MODE4_PSI_BUID_LSH PPC_BITLSHIFT(27) +#define GX_P7P_MODE4_NX_BUID_BASE PPC_BITMASK(1,9) +#define GX_P7P_MODE4_NX_BUID_MASK PPC_BITMASK(10,18) +#define GX_P7P_MODE4_PSI_BUID PPC_BITMASK(19,27) #define GX_P7P_MODE4_PSI_BUID_DISABLE PPC_BIT(28) /* P7 GX TCE BAR and mask */ #define GX_P7_GX0_TCE_BAR 0x02011845 -#define GX_P7_TCE_BAR_ADDR_MASK PPC_BITMASK(0,25) -#define GX_P7_TCE_BAR_ADDR_LSH PPC_BITLSHIFT(25) +#define GX_P7_TCE_BAR_ADDR PPC_BITMASK(0,25) #define GX_P7_TCE_BAR_ADDR_SHIFT PPC_BITLSHIFT(43) #define GX_P7_TCE_BAR_ENABLE PPC_BIT(26) #define GX_P7_GX0_TCE_MASK 0x0201184B -#define GX_P7_TCE_MASK_MASK PPC_BITMASK(0,25) -#define GX_P7_TCE_MASK_LSH PPC_BITLSHIFT(25) +#define GX_P7_TCE_MASK PPC_BITMASK(0,25) #define GX_P7_GX1_TCE_BAR 0x02011885 #define GX_P7_GX1_TCE_MASK 0x0201188B |