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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2020-04-23 19:54:43 +0200 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2020-05-26 14:30:29 +1000 |
| commit | afe6bc9051907d25082309895f8cfe44f59e2f25 (patch) | |
| tree | 61873aa988d85d1d97a9ac2b91b9c0ac5859ec8c /hw | |
| parent | 11d12c6fb60af42b89930fe776958f0eb208dd23 (diff) | |
| download | skiboot-afe6bc9051907d25082309895f8cfe44f59e2f25.zip skiboot-afe6bc9051907d25082309895f8cfe44f59e2f25.tar.gz skiboot-afe6bc9051907d25082309895f8cfe44f59e2f25.tar.bz2 | |
platform/mihawk: Tune equalization settings for opencapi
The Bittware 250SOC adapter on Mihawk was showing a high count of CRC
errors on one of the opencapi slots. The PHY team suggested new
equalization settings to correct the errors.
All existing adapters have been tested on mihawk to make sure the
settings are compatible. However, the new settings should not be used
on platforms other than mihawk.
The changes specific to mihawk are:
- Update the tx_ffe_pre_coeff and tx_ffe_post_coeff input parameters
used during zcal
- turn off the tx_ffe_boost parameter through scom
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x
Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/npu2-hw-procedures.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index 6236380..fb88dfd 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -78,6 +78,7 @@ static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_DONE = {0x3c1, 50, 1}; static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_ERROR = {0x3c1, 51, 1}; static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_N = {0x3c3, 48, 9}; static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_P = {0x3c5, 48, 9}; +static struct npu2_phy_reg NPU2_PHY_TX_FFE_BOOST_EN = {0x34b, 59, 1}; static struct npu2_phy_reg NPU2_PHY_TX_PSEG_PRE_EN = {0x34d, 51, 5}; static struct npu2_phy_reg NPU2_PHY_TX_PSEG_PRE_SELECT = {0x34d, 56, 5}; static struct npu2_phy_reg NPU2_PHY_TX_NSEG_PRE_EN = {0x34f, 51, 5}; @@ -533,6 +534,8 @@ static uint32_t therm_with_half(uint32_t dec, uint8_t width) static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev) { int p_value, n_value; + int ffe_pre_coeff = FFE_PRE_COEFF; + int ffe_post_coeff = FFE_POST_COEFF; uint32_t zcal_n; uint32_t zcal_p; uint32_t p_main_enable = MAIN_X2_MAX; @@ -564,9 +567,15 @@ static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev) (zcal_p < ZCAL_MIN) || (zcal_p > ZCAL_MAX)) return PROCEDURE_COMPLETE | PROCEDURE_FAILED; + if (ndev->type == NPU2_DEV_TYPE_OPENCAPI && + platform.ocapi->phy_setup) { + ffe_pre_coeff = platform.ocapi->phy_setup->tx_ffe_pre_coeff; + ffe_post_coeff = platform.ocapi->phy_setup->tx_ffe_post_coeff; + } + p_value = zcal_p - TOTAL_X2_MAX; - p_precursor_select = (p_value * FFE_PRE_COEFF)/128; - p_postcursor_select = (p_value * FFE_POST_COEFF)/128; + p_precursor_select = (p_value * ffe_pre_coeff)/128; + p_postcursor_select = (p_value * ffe_post_coeff)/128; margin_pu_select = (p_value * MARGIN_RATIO)/256; if (p_value % 2) { @@ -587,8 +596,8 @@ static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev) } n_value = zcal_n - TOTAL_X2_MAX; - n_precursor_select = (n_value * FFE_PRE_COEFF)/128; - n_postcursor_select = (n_value * FFE_POST_COEFF)/128; + n_precursor_select = (n_value * ffe_pre_coeff)/128; + n_postcursor_select = (n_value * ffe_post_coeff)/128; margin_pd_select = (p_value * MARGIN_RATIO)/256; if (n_value % 2) { @@ -1020,6 +1029,12 @@ void npu2_opencapi_bump_ui_lane(struct npu2_dev *dev) void npu2_opencapi_phy_init(struct npu2_dev *dev) { + if (platform.ocapi->phy_setup) { + OCAPIINF(dev, "Enabling platform-specific PHY setup\n"); + phy_write(dev, &NPU2_PHY_TX_FFE_BOOST_EN, + platform.ocapi->phy_setup->tx_ffe_boost_en); + } + run_procedure(dev, 5); /* procedure_phy_tx_zcal */ /* * This is only required for OpenCAPI - Hostboot tries to set this |