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author | Nicholas Piggin <npiggin@gmail.com> | 2019-12-08 22:23:10 +1000 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2019-12-16 14:50:56 +1100 |
commit | 5178691d0ad8d684f061d596dc6e025823fc0fec (patch) | |
tree | 7a9c85f6eabad8b9156ad6dc10b6a1ce49540672 /hw | |
parent | a0cf95fea1f6681f866e4cb449bde56bf729819e (diff) | |
download | skiboot-5178691d0ad8d684f061d596dc6e025823fc0fec.zip skiboot-5178691d0ad8d684f061d596dc6e025823fc0fec.tar.gz skiboot-5178691d0ad8d684f061d596dc6e025823fc0fec.tar.bz2 |
add more sparse endian annotations
This fixes quite a few sparse endian annotations across the tree.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/ast-bmc/ast-sf-ctrl.c | 5 | ||||
-rw-r--r-- | hw/imc.c | 4 | ||||
-rw-r--r-- | hw/psi.c | 2 | ||||
-rw-r--r-- | hw/slw.c | 10 |
4 files changed, 11 insertions, 10 deletions
diff --git a/hw/ast-bmc/ast-sf-ctrl.c b/hw/ast-bmc/ast-sf-ctrl.c index ece847d..f1814c4 100644 --- a/hw/ast-bmc/ast-sf-ctrl.c +++ b/hw/ast-bmc/ast-sf-ctrl.c @@ -169,12 +169,13 @@ static void ast_sf_end_cmd(struct ast_sf_ctrl *ct) static int ast_sf_send_addr(struct ast_sf_ctrl *ct, uint32_t addr) { const void *ap; + beint32_t tmp; /* Layout address MSB first in memory */ - addr = cpu_to_be32(addr); + tmp = cpu_to_be32(addr); /* Send the right amount of bytes */ - ap = (char *)&addr; + ap = (char *)&tmp; if (ct->mode_4b) return ast_copy_to_ahb(ct->flash, ap, 4); @@ -448,8 +448,8 @@ void imc_catalog_preload(void) static void imc_dt_update_nest_node(struct dt_node *dev) { struct proc_chip *chip; - uint64_t *base_addr = NULL; - uint32_t *chipids = NULL; + __be64 *base_addr = NULL; + __be32 *chipids = NULL; int i=0, nr_chip = nr_chips(); struct dt_node *node; const struct dt_property *type; @@ -782,7 +782,7 @@ static void psi_activate_phb(struct psi *psi) static void psi_create_p9_int_map(struct psi *psi, struct dt_node *np) { - uint32_t map[P9_PSI_NUM_IRQS][4]; + __be32 map[P9_PSI_NUM_IRQS][4]; int i; for (i = 0; i < P9_PSI_NUM_IRQS; i++) { @@ -725,8 +725,8 @@ void add_cpu_idle_state_properties(void) bool has_stop_inst = false; u8 i; - u64 *pm_ctrl_reg_val_buf; - u64 *pm_ctrl_reg_mask_buf; + fdt64_t *pm_ctrl_reg_val_buf; + fdt64_t *pm_ctrl_reg_mask_buf; u32 supported_states_mask; u32 opal_disabled_states_mask = ~0xEC000000; /* all but stop11 */ const char* nvram_disable_str; @@ -739,9 +739,9 @@ void add_cpu_idle_state_properties(void) /* Buffers to hold idle state properties */ char *name_buf, *alloced_name_buf; - u32 *latency_ns_buf; - u32 *residency_ns_buf; - u32 *flags_buf; + fdt32_t *latency_ns_buf; + fdt32_t *residency_ns_buf; + fdt32_t *flags_buf; prlog(PR_DEBUG, "CPU idle state device tree init\n"); |