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authorAndrew Jeffery <andrew@aj.id.au>2018-07-17 11:32:54 +0930
committerStewart Smith <stewart@linux.ibm.com>2018-07-17 01:13:16 -0500
commit1d8793c64b596cfdcc3cf6035a3b4cbe3c341ae9 (patch)
tree79e5822309463faa9d7763799fe2eb1875a05988 /hw
parentebc8524a3a457f73083d984296bfd797940a711c (diff)
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lpc: Silence LPC SYNC no-response error when necessary
Add the ability to silence particular errors from the LPC bus when they can be expected, particularly: LPC[000]: Got SYNC no-response error. Error address reg: 0xd001002f This is necessary on platform exit on some astbmc machines to avoid unnecessary noise in the msglog. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/ast-bmc/ast-io.c45
-rw-r--r--hw/lpc.c23
2 files changed, 67 insertions, 1 deletions
diff --git a/hw/ast-bmc/ast-io.c b/hw/ast-bmc/ast-io.c
index eb80181..4277e2d 100644
--- a/hw/ast-bmc/ast-io.c
+++ b/hw/ast-bmc/ast-io.c
@@ -360,6 +360,51 @@ bool ast_sio_init(void)
return enabled;
}
+bool ast_sio_disable(void)
+{
+ uint32_t hw_strapping;
+ uint32_t silicon_rev;
+ uint8_t family;
+
+ /* Determine the necessary strapping value */
+ silicon_rev = ast_ahb_readl(SCU_REVISION_ID);
+ family = SCU_REVISION_SOC_FAMILY(silicon_rev);
+
+ if (family == SCU_REVISION_SOC_FAMILY_2400) {
+ /* Strapping is read-modify-write on SCU70 */
+ hw_strapping = SCU_STRAP_SIO_DECODE_DISABLE;
+ hw_strapping |= ast_ahb_readl(SCU_HW_STRAPPING);
+ } else if (family == SCU_REVISION_SOC_FAMILY_2500) {
+ /*
+ * Strapping is W1S on SCU70, W1C on SCU7C. We're setting a bit
+ * so read-modify-write *should* work, but in reality it breaks
+ * the AXI/AHB divider, so don't do that.
+ */
+ hw_strapping = SCU_STRAP_SIO_DECODE_DISABLE;
+ } else {
+ prerror("PLAT: Unrecognised BMC silicon revision 0x%x\n",
+ silicon_rev);
+ return false;
+ }
+
+ /* Apply the strapping value */
+ bmc_sio_get(BMC_SIO_DEV_LPC2AHB);
+
+ bmc_sio_ahb_prep(SCU_HW_STRAPPING, 2);
+
+ bmc_sio_outb(hw_strapping >> 24, 0xf4);
+ bmc_sio_outb(hw_strapping >> 16, 0xf5);
+ bmc_sio_outb(hw_strapping >> 8, 0xf6);
+ bmc_sio_outb(hw_strapping , 0xf7);
+
+ lpc_irq_err_mask_sync_no_response();
+ bmc_sio_outb(0xcf, 0xfe);
+
+ bmc_sio_put(true);
+
+ return true;
+}
+
bool ast_can_isolate_sp(void)
{
return bmc_sio_inb(BMC_SIO_PLAT_FLAGS) & BMC_SIO_PLAT_ISOLATE_SP;
diff --git a/hw/lpc.c b/hw/lpc.c
index fbc49c5..0eccad8 100644
--- a/hw/lpc.c
+++ b/hw/lpc.c
@@ -891,6 +891,20 @@ static void lpc_dispatch_reset(struct lpcm *lpc)
lpc_setup_serirq(lpc);
}
+uint32_t lpc_irq_err_mask;
+
+void lpc_irq_err_mask_sync_no_response(void)
+{
+ lpc_irq_err_mask |= LPC_HC_IRQ_SYNC_NORESP_ERR;
+ lwsync();
+}
+
+static void lpc_irq_err_mask_reset(void)
+{
+ lpc_irq_err_mask = 0;
+ lwsync();
+}
+
static void lpc_dispatch_err_irqs(struct lpcm *lpc, uint32_t irqs)
{
const char *sync_err = "Unknown LPC error";
@@ -911,8 +925,12 @@ static void lpc_dispatch_err_irqs(struct lpcm *lpc, uint32_t irqs)
lpc_dispatch_reset(lpc);
if (irqs & LPC_HC_IRQ_SYNC_ABNORM_ERR)
sync_err = "Got SYNC abnormal error.";
- if (irqs & LPC_HC_IRQ_SYNC_NORESP_ERR)
+ if (irqs & LPC_HC_IRQ_SYNC_NORESP_ERR) {
+ if (lpc_irq_err_mask & LPC_HC_IRQ_SYNC_NORESP_ERR)
+ goto done;
+
sync_err = "Got SYNC no-response error.";
+ }
if (irqs & LPC_HC_IRQ_SYNC_NORM_ERR)
sync_err = "Got SYNC normal error.";
if (irqs & LPC_HC_IRQ_SYNC_TIMEOUT_ERR)
@@ -940,6 +958,9 @@ static void lpc_dispatch_err_irqs(struct lpcm *lpc, uint32_t irqs)
log_simple_error(info, "LPC[%03x]: %s Error address reg: "
"0x%08x\n",
lpc->chip_id, sync_err, err_addr);
+
+done:
+ lpc_irq_err_mask_reset();
}
static void lpc_dispatch_ser_irqs(struct lpcm *lpc, uint32_t irqs,