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author | Reza Arbab <arbab@linux.ibm.com> | 2019-08-07 11:21:42 -0500 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2019-08-16 15:51:55 +1000 |
commit | 2422c100f6be8c8643caa98191f1c05a0d01d160 (patch) | |
tree | 474b0267aac1183b553285200ea55c238bab32a2 /hw | |
parent | 82b576886fd6d2bda3e27b0949a972c18b5a9fbf (diff) | |
download | skiboot-2422c100f6be8c8643caa98191f1c05a0d01d160.zip skiboot-2422c100f6be8c8643caa98191f1c05a0d01d160.tar.gz skiboot-2422c100f6be8c8643caa98191f1c05a0d01d160.tar.bz2 |
npu3: Expose remaining ATSD launch registers
List all 16 ATSD registers in the device tree, not just the first 8.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/npu3-nvlink.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/hw/npu3-nvlink.c b/hw/npu3-nvlink.c index 3939f2c..35f68a8 100644 --- a/hw/npu3-nvlink.c +++ b/hw/npu3-nvlink.c @@ -1383,6 +1383,17 @@ static void npu3_dev_create_pvd(struct npu3_dev *dev) npu3_cfg_populate(dev); } +static void npu3_dt_add_mmio_atsd(struct npu3 *npu) +{ + struct dt_node *dn = npu->nvlink.phb.dt_node; + uint64_t mmio_atsd[NPU3_XTS_ATSD_MAX]; + + for (uint32_t i = 0; i < NPU3_XTS_ATSD_MAX; i++) + mmio_atsd[i] = npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(i); + + dt_add_property(dn, "ibm,mmio-atsd", mmio_atsd, sizeof(mmio_atsd)); +} + static void npu3_dt_add_mmio_window(struct npu3 *npu) { struct dt_node *dn = npu->nvlink.phb.dt_node; @@ -1478,16 +1489,8 @@ static void npu3_dt_add_props(struct npu3 *npu) dt_add_property_cells(dn, "ibm,links", NPU3_LINKS_PER_NPU); dt_add_property(dn, "reg", npu->regs, sizeof(npu->regs)); - dt_add_property_u64s(dn, "ibm,mmio-atsd", - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(0), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(1), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(2), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(3), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(4), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(5), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(6), - npu->regs[0] + NPU3_XTS_ATSD_LAUNCH(7)); + npu3_dt_add_mmio_atsd(npu); npu3_dt_add_mmio_window(npu); npu3_dt_add_interrupts(npu); } |