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authorMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>2017-12-18 23:41:15 +0530
committerStewart Smith <stewart@linux.vnet.ibm.com>2018-01-14 23:48:48 -0600
commit3c38214ab4f097a307058361428f9be8a239f1db (patch)
tree88ddb107a5a255f2b3f718ff6bc577c4b197f428 /hw
parent6f8c49b0bac4975aceef96e2f11c70bdf75c284e (diff)
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opal/xstop: Use nvram option to enable/disable sw checkstop.
Add a mechanism to enable/disable sw checkstop by looking at nvram option opal-sw-xstop=<enable/disable>. For now this patch disables the sw checkstop trigger unless explicitly enabled through nvram option 'opal-sw-xstop=enable'i for p9. This will allow an opportunity to get host kernel in panic path or xmon for unrecoverable HMIs or MCE, to be able to debug the issue effectively. To enable sw checkstop in opal issue following command: # nvram -p ibm,skiboot --update-config opal-sw-xstop=enable NOTE: This is a workaround patch to disable sw checkstop by default to gain control in host kernel for better checkstop debugging. Once we have most of the checkstop issues stabilized/resolved, revisit this patch to enable sw checkstop by default. For p8 platform it will remain enabled by default unless explicitly disabled. To disable sw checkstop on p8 issue following command: # nvram -p ibm,skiboot --update-config opal-sw-xstop=disable Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Reviewed-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/xscom.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/hw/xscom.c b/hw/xscom.c
index de5a27e..0501278 100644
--- a/hw/xscom.c
+++ b/hw/xscom.c
@@ -24,6 +24,7 @@
#include <errorlog.h>
#include <opal-api.h>
#include <timebase.h>
+#include <nvram.h>
/* Mask of bits to clear in HMER before an access */
#define HMER_CLR_MASK (~(SPR_HMER_XSCOM_FAIL | \
@@ -826,6 +827,37 @@ static void xscom_init_chip_info(struct proc_chip *chip)
int64_t xscom_trigger_xstop(void)
{
int rc = OPAL_UNSUPPORTED;
+ bool xstop_disabled = false;
+
+ /*
+ * Workaround until we iron out all checkstop issues at present.
+ *
+ * For p9:
+ * By default do not trigger sw checkstop unless explicitly enabled
+ * through nvram option 'opal-sw-xstop=enable'.
+ *
+ * For p8:
+ * Keep it enabled by default unless explicitly disabled.
+ *
+ * NOTE: Once all checkstop issues are resolved/stabilized reverse
+ * the logic to enable sw checkstop by default on p9.
+ */
+ switch (proc_gen) {
+ case proc_gen_p8:
+ if (nvram_query_eq("opal-sw-xstop", "disable"))
+ xstop_disabled = true;
+ break;
+ case proc_gen_p9:
+ default:
+ if (!nvram_query_eq("opal-sw-xstop", "enable"))
+ xstop_disabled = true;
+ break;
+ }
+
+ if (xstop_disabled) {
+ prlog(PR_NOTICE, "Software initiated checkstop disabled.\n");
+ return rc;
+ }
if (xstop_xscom.addr)
rc = xscom_writeme(xstop_xscom.addr,