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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-11-14 13:06:20 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-11-15 15:06:03 +1100 |
| commit | 6a5842b5a1769fbfca965d617c2c43f95334400e (patch) | |
| tree | 91adc0d5a0f3a9e0860981dbc1cc5f0340114e58 /hw | |
| parent | b9ce5f582dbab262c9ffd3d3260c942275f54213 (diff) | |
| download | skiboot-6a5842b5a1769fbfca965d617c2c43f95334400e.zip skiboot-6a5842b5a1769fbfca965d617c2c43f95334400e.tar.gz skiboot-6a5842b5a1769fbfca965d617c2c43f95334400e.tar.bz2 | |
phb4: Fix setting of max link speed
Make sure we set consistent values between Init_4 and Init_14 and
set the default to Gen4 not Gen3
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/phb4.c | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -2685,7 +2685,8 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) } /* Init_14 - Clear link training */ - phb4_pcicfg_write32(&p->phb, 0, 0x78, 0x0400FE07); + phb4_pcicfg_write32(&p->phb, 0, 0x78, + 0x0000FE07 | (p->max_link_speed << 24)); /* Init_15 - deassert cores reset */ /* @@ -3054,7 +3055,7 @@ static void phb4_create(struct dt_node *np) p->phb.ops = &phb4_ops; p->phb.phb_type = phb_type_pcie_v4; p->phb.scan_map = 0x1; /* Only device 0 to scan */ - p->max_link_speed = dt_prop_get_u32_def(np, "ibm,max-link-speed", 3); + p->max_link_speed = dt_prop_get_u32_def(np, "ibm,max-link-speed", 4); p->state = PHB4_STATE_UNINITIALIZED; if (!phb4_calculate_windows(p)) |