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author | Vaibhav Jain <vaibhav@linux.ibm.com> | 2018-09-17 12:22:15 +0530 |
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committer | Stewart Smith <stewart@linux.ibm.com> | 2018-09-20 14:30:51 +1000 |
commit | 0f7868260709928e331e428995ffaf5dd9567b69 (patch) | |
tree | c4161aefc0847381a7c09267bf52c0d5b378cf60 /hw | |
parent | 09fabd68f732a4520775f3390aafb74f1b972ff9 (diff) | |
download | skiboot-0f7868260709928e331e428995ffaf5dd9567b69.zip skiboot-0f7868260709928e331e428995ffaf5dd9567b69.tar.gz skiboot-0f7868260709928e331e428995ffaf5dd9567b69.tar.bz2 |
phb4: Re-factor phb4_fenced() and introduce phb4_dump_pec_err_regs()
Couple of places in 'phb4.c' where we may want to dump the PEC's error
registers. Hence we introduce a phb4_dump_pec_err_regs() that dumps
all the PEC error registers and also update phb4->nfir_cache &
phb4->pfir_cache for later use.
Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/phb4.c | 68 |
1 files changed, 38 insertions, 30 deletions
@@ -2477,6 +2477,36 @@ static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) PHBERR(p, "%s\n", s); } +static void phb4_dump_pec_err_regs(struct phb4 *p) +{ + uint64_t nfir_p_wof, nfir_n_wof, err_aib; + uint64_t err_rpt0, err_rpt1; + + /* Read the PCI and NEST FIRs and dump them. Also cache PCI/NEST FIRs */ + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR, &p->pfir_cache); + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR_WOF, &nfir_p_wof); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR, &p->nfir_cache); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR_WOF, &nfir_n_wof); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT0, &err_rpt0); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT1, &err_rpt1); + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PBAIB_ERR_REPORT, &err_aib); + + PHBERR(p, " PCI FIR=%016llx\n", p->pfir_cache); + PHBERR(p, " PCI FIR WOF=%016llx\n", nfir_p_wof); + PHBERR(p, " NEST FIR=%016llx\n", p->nfir_cache); + PHBERR(p, " NEST FIR WOF=%016llx\n", nfir_n_wof); + PHBERR(p, " ERR RPT0=%016llx\n", err_rpt0); + PHBERR(p, " ERR RPT1=%016llx\n", err_rpt1); + PHBERR(p, " AIB ERR=%016llx\n", err_aib); +} + static void phb4_dump_capp_err_regs(struct phb4 *p) { uint64_t fir, apc_master_err, snoop_err, transport_err; @@ -2502,8 +2532,6 @@ static void phb4_dump_capp_err_regs(struct phb4 *p) /* Check if AIB is fenced via PBCQ NFIR */ static bool phb4_fenced(struct phb4 *p) { - uint64_t nfir_p, nfir_p_wof, nfir_n, nfir_n_wof, err_aib; - uint64_t err_rpt0, err_rpt1; /* Already fenced ? */ if (p->flags & PHB4_AIB_FENCED) @@ -2516,37 +2544,17 @@ static bool phb4_fenced(struct phb4 *p) if (in_be64(p->regs + PHB_CPU_LOADSTORE_STATUS)!= 0xfffffffffffffffful) return false; - PHBERR(p, "PHB Freeze/Fence detected !\n"); - - /* We read the PCI and NEST FIRs and dump them */ - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR, &nfir_p); - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR_WOF, &nfir_p_wof); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR, &nfir_n); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR_WOF, &nfir_n_wof); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT0, &err_rpt0); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT1, &err_rpt1); - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PBAIB_ERR_REPORT, &err_aib); - - PHBERR(p, " PCI FIR=%016llx\n", nfir_p); - PHBERR(p, " PCI FIR WOF=%016llx\n", nfir_p_wof); - PHBERR(p, " NEST FIR=%016llx\n", nfir_n); - PHBERR(p, " NEST FIR WOF=%016llx\n", nfir_n_wof); - PHBERR(p, " ERR RPT0=%016llx\n", err_rpt0); - PHBERR(p, " ERR RPT1=%016llx\n", err_rpt1); - PHBERR(p, " AIB ERR=%016llx\n", err_aib); - /* Mark ourselves fenced */ p->flags |= PHB4_AIB_FENCED; - /* dump capp error registers in case phb was fenced due to capp */ - if (nfir_n & XPEC_NEST_STK_PCI_NFIR_CXA_PE_CAPP) + PHBERR(p, "PHB Freeze/Fence detected !\n"); + phb4_dump_pec_err_regs(p); + + /* + * dump capp error registers in case phb was fenced due to capp. + * Expect p->nfir_cache already updated in phb4_dump_pec_err_regs() + */ + if (p->nfir_cache & XPEC_NEST_STK_PCI_NFIR_CXA_PE_CAPP) phb4_dump_capp_err_regs(p); phb4_eeh_dump_regs(p); |