diff options
| author | Alistair Popple <alistair@popple.id.au> | 2018-01-24 14:44:58 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-01-30 20:42:38 -0600 |
| commit | ea9b3080559a995ef80772749b36da3031b388a4 (patch) | |
| tree | d35df2b8cc327df78926e320f28fbaefb940d7a7 /hw | |
| parent | 91f3e391f27aa90ee383e49683cef9926b99a08c (diff) | |
| download | skiboot-ea9b3080559a995ef80772749b36da3031b388a4.zip skiboot-ea9b3080559a995ef80772749b36da3031b388a4.tar.gz skiboot-ea9b3080559a995ef80772749b36da3031b388a4.tar.bz2 | |
npu2-hw-procedures.c: Correct phy lane mapping
Each nvlink device is associated with a particular group of OBUS lanes via
a lane mask which is read from HDAT via the device-tree. However Skiboot's
interpretation of lane mask was different to what is exported from the
HDAT.
Specifically the lane mask bits in the HDAT are encoded in IBM bit ordering
for a 24-bit wide value. So for example in normal bit ordering lane-0 is
represented by having lane-mask bit 23 set and lane-23 is represented by
lane-mask bit 0. This patch alters the Skiboot interpretation to match what
is passed from HDAT.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/npu2-hw-procedures.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index a43952d..b21c399 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -102,12 +102,12 @@ struct npu2_phy_reg NPU2_PHY_RX_CTL_DATASM_CLKDIST_PDWN = {0x2e0, 60, 1}; #define NPU2_PHY_REG(scom_base, reg, lane) \ SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane) -#define NPU2_MAX_PHY_LANES 24 +#define NPU2_MAX_PHY_LANE 23 /* This is a bit of a gross hack but it does the job */ #define FOR_EACH_LANE(ndev, lane) \ - for (lane = 0; lane < NPU2_MAX_PHY_LANES; lane++) \ - if (!(ndev->lane_mask & (1 << lane))) \ + for (lane = 0; lane <= NPU2_MAX_PHY_LANE; lane++) \ + if (!(ndev->lane_mask & (1 << (NPU2_MAX_PHY_LANE - lane)))) \ continue; \ else |