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author | Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> | 2018-04-16 23:03:49 +0530 |
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committer | Stewart Smith <stewart@linux.ibm.com> | 2018-04-17 03:52:10 -0500 |
commit | 67d738807da0bbd6fe73e30d25753b6de1299df8 (patch) | |
tree | ffa42db384950ac15ec042abe070452363839d7d /hw | |
parent | 5e20a789d021dd14bb30439cd9b3beb3dfeed9b7 (diff) | |
download | skiboot-67d738807da0bbd6fe73e30d25753b6de1299df8.zip skiboot-67d738807da0bbd6fe73e30d25753b6de1299df8.tar.gz skiboot-67d738807da0bbd6fe73e30d25753b6de1299df8.tar.bz2 |
opal/hmi: Do not send HMI event if no errors are found.
For TOD errors, all the cores in the chip get HMIs. Any one thread from any
core can fix the issue and TFMR will have error conditions cleared. Rest of
the threads need take any action if TOD errors are already cleared. Hence
thread 0 of every core should get a fresh copy of TFMR before going ahead
recovery path. Initialize recover = -1, so that if no errors found that
thread need not send a HMI event to linux. This helps in stop flooding host
with hmi event by every thread even there are no errors found.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/chiptod.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/chiptod.c b/hw/chiptod.c index a160e5a..f6ef9a4 100644 --- a/hw/chiptod.c +++ b/hw/chiptod.c @@ -1505,8 +1505,9 @@ bool tfmr_clear_core_errors(uint64_t tfmr) * 1 <= Successfully recovered from errors * -1 <= No errors found. Errors are already been fixed. */ -int chiptod_recover_tb_errors(uint64_t tfmr, bool *out_resynced) +int chiptod_recover_tb_errors(bool *out_resynced) { + uint64_t tfmr; int rc = -1; *out_resynced = false; @@ -1516,6 +1517,9 @@ int chiptod_recover_tb_errors(uint64_t tfmr, bool *out_resynced) lock(&chiptod_lock); + /* Get fresh copy of TFMR */ + tfmr = mfspr(SPR_TFMR); + /* * Check for TB errors. * On Sync check error, bit 44 of TFMR is set. Check for it and |