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author | Russell Currey <ruscur@russell.cc> | 2017-06-09 16:06:03 +1000 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-15 13:37:37 +1000 |
commit | cd48b15b132a5c7ea30ae3fa6f2144236b9ea88b (patch) | |
tree | 035cda603970964adfa2f34105bd5d74f6b2a480 /hw | |
parent | 32696144ae99100837a4f9a01e0827e1bbe9958a (diff) | |
download | skiboot-cd48b15b132a5c7ea30ae3fa6f2144236b9ea88b.zip skiboot-cd48b15b132a5c7ea30ae3fa6f2144236b9ea88b.tar.gz skiboot-cd48b15b132a5c7ea30ae3fa6f2144236b9ea88b.tar.bz2 |
phb4: Implement root port initialization
phb4_root_port_init() was a NOP before, so fix that.
Nothing PHB4-specific here. Something may be required in future.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/phb4.c | 17 |
1 files changed, 11 insertions, 6 deletions
@@ -486,16 +486,22 @@ static int64_t phb4_get_reserved_pe_number(struct phb *phb) } -static void phb4_root_port_init(struct phb *phb __unused, - struct pci_device *dev __unused, - int ecap __unused, - int aercap __unused) +static void phb4_root_port_init(struct phb *phb, struct pci_device *dev, + int ecap, int aercap) { -#if 0 uint16_t bdfn = dev->bdfn; uint16_t val16; uint32_t val32; + /* + * Use the PHB's callback so that UTL events will be masked or + * unmasked when the link is down or up. + */ + if (dev->slot && dev->slot->ops.prepare_link_change && + phb->slot && phb->slot->ops.prepare_link_change) + dev->slot->ops.prepare_link_change = + phb->slot->ops.prepare_link_change; + // FIXME: check recommended init values for phb4 /* Enable SERR and parity checking */ @@ -549,7 +555,6 @@ static void phb4_root_port_init(struct phb *phb __unused, PCIECAP_AER_RERR_CMD_NFE | PCIECAP_AER_RERR_CMD_CE); pci_cfg_write32(phb, bdfn, aercap + PCIECAP_AER_RERR_CMD, val32); -#endif } static void phb4_switch_port_init(struct phb *phb, |