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authorReza Arbab <arbab@linux.vnet.ibm.com>2017-07-31 21:36:57 -0500
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-08-04 17:13:10 +1000
commit5d706909572573de12e2879d26a89805972d38ab (patch)
tree72aaaabc392abbf60fe769d4daf25c745571467b /hw
parent700611a48025c5a556bb0aa011ac81bb5d1bcbc1 (diff)
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npu2: Add a function to detect POWER9 DD1
Provide a convenience we'll use quite a bit to preserve backwards compatibility with DD1. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/npu2.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/npu2.c b/hw/npu2.c
index d074836..91cb487 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -58,6 +58,16 @@
#define VENDOR_CAP_PCI_DEV_OFFSET 0x0d
+static bool is_p9dd1(void)
+{
+ struct proc_chip *chip = next_chip(NULL);
+
+ return chip &&
+ (chip->type == PROC_CHIP_P9_NIMBUS ||
+ chip->type == PROC_CHIP_P9_CUMULUS) &&
+ (chip->ec_level & 0xf0) == 0x10;
+}
+
/*
* We use the indirect method because it uses the same addresses as
* the MMIO offsets (NPU RING)